Synchronous decoder for self-clocking signals

Details Synchronous decoder for self-clocking signals Synchronous decoder for self-clocking signals

1991-04-08

1994-02-15

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

375 87, 375120, H04J 312

Patent

active

052873595

ABSTRACT:
A circuit for receiving and decoding Manchester-encoded communication signals such as those used in an Ethernet network. The circuit uses a single local reference clock signal to clock a shift register that temporarily stores samples of the incoming signal. A window pointer selects a particular bit of the shift register as the current output bit; the value of the window pointer is maintained by a feedback loop which tracks any phase error in the incoming signal, that the output data remains in phase with the incoming signal. The combined functions of a Manchester-decoder and retiming circuit are thus provided in a simple circuit.

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Alexandridis, Microprocessor System Design Concepts, pp. 126-131.
Anonymous research disclosure No. 31998 dated Nov. 1990.

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