Synchronous clock generator for digital signal multiplex devices

Details Synchronous clock generator for digital signal multiplex devices Synchronous clock generator for digital signal multiplex devices

1983-07-01

1986-01-21

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 84, H04J 306

Patent

active

045660999

ABSTRACT:
An exemplary embodiment includes a first binary counter whose counting period corresponds to a block length of a pulse frame, a block counter controlled by the first counter, and a logic element for generating working clock signals, wherein the counters are switchable for employment in different multiplex systems and the logic element gates out the working clock signals for different multiplex systems.

REFERENCES:
patent: 3789195 (1974-01-01), Meier et al.
patent: 4076964 (1978-02-01), Henrion et al.
patent: 4121055 (1978-10-01), Doherty
patent: 4340962 (1982-07-01), Wintzer et al.

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