Synchronizing signal generator

Television – Synchronization – Sync generation

Patent

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Details

348524, 345213, H04N 506

Patent

active

061375365

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to a synchronizing signal generator used in equipment for processing a video signal displayed in video display equipment, such as a computer display and the like.


BACKGROUND ART

Before describing a conventional synchronizing signal generator by referring to FIG. 4 and FIG. 5, the role of the synchronizing signal generator in video display equipment will now be described briefly.
When displaying a video output from a video signal source such as a television, a video tape recorder, a computer, and the like as an image in video display equipment such as a television receiver, a computer display, and the like, it is important that the horizontal synchronizing signal and the vertical synchronizing signal included in the video signal outputted from such a video signal source be stable and synchronized with each other.
However, the periods and phases of the horizontal synchronizing signal and the vertical synchronizing signal vary due to various effects of the transmission path on which the video signal travels, operation of switching the input of the video signal, and the like. Such variations in the synchronizing signals make the video signal unstable. As a result, the image reproduced and displayed from the video signal becomes unstable and inferior in quality.
In order to solve the unstableness of the synchronizing signals due to the transmission path or input switch, the following measure has conventionally been taken on the side of the receiver receiving the input of the video signal from the video signal source. That is to say, stable horizontal and vertical synchronizing pulses serving as a reference of synchronization are generated in the receiver. These stable horizontal and vertical synchronizing pulses are respectively synchronized with the horizontal synchronizing signal Hsync and the vertical synchronizing signal Vsync included in the inputted video signal to stabilize the video signal. An image is displayed on the basis of the video signal thus stabilized.
For the generation of the synchronization-reference horizontal and vertical synchronizing pulses, a synchronizing signal generator of so-called horizontal and vertical countdown system is used, in which a counter driven on the basis of a reference clock is used to count the horizontal synchronization periods and vertical synchronization periods.
FIG. 4 shows a synchronizing signal generator of the horizontal and vertical countdown system used in a television receiver as an example of a conventional synchronizing signal generator. The synchronizing signal generator SSGc in this example has a first input port Pih, a second input port Piv, a phase comparator 2, a voltage-controlled oscillator (VCO) 3, a first frequency divider 4, a second frequency divider 5, a trigger generator 7, a counter 8, a pulse generator 9, a first output port Pohp, and a second output port Povp.
The input port Pih and the input port Piv are connected to an external video signal source (not shown) to respectively receive input of the horizontal synchronizing signal Hsync and the vertical synchronizing signal Vsync included in the video signal. The first frequency divider 4 generates an output wave whose frequency is 1
of the input frequency, and the second frequency divider 5 generates an output wave of 2
of the input frequency. That is to say, the division ratios of the first frequency divider 4 and the second frequency divider 5 are 1
and 2
, respectively. In this example, n is set to 32, and the division ratio of the frequency divider 4 is 1/32 and the division ratio of the frequency divider 5 is 1/16.
The phase comparator 2, the voltage-controlled oscillator 3, and the first frequency divider 4 are connected to each other to form a PLL circuit 20. The voltage-controlled oscillator 3 generates a first clock pulse Sck1 having a given frequency F (period P=1/F) on the basis of a voltage inputted from the phase comparator 2. The first frequency divider 4 divides the period of the clock pulse Sck1 inputted from the volt

REFERENCES:
patent: 4639280 (1987-01-01), Willis
patent: 5686968 (1997-11-01), Vjiie et al.
patent: 5790200 (1998-08-01), Tsujimoto et al.

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