Synchronizing signal detector circuit

Details Synchronizing signal detector circuit Synchronizing signal detector circuit

1982-02-19

1983-09-20

Chin, Tommy P.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

328139, H04L 700, H04N 508, H03K 1728

Patent

active

044059450

ABSTRACT:
An AFC (auto frequency control) loop circuit is provided to generate first synchronizing pulses synchronized with horizontal synchronizing signal separated from a composite synchronizing signal. A first synchronous flip-flop connected to receive this synchronizing pulse as clock pulse and a vertical synchronizing signal separated from the composite synchronizing signal. The output of the first flip-flop is applied to an input of a second synchronous flip-flop which is connected to receive the first synchronizing pulses as clock pulses. Second synchronizing pulses are obtained by a logical product operator circuit to perform the logical product operation between an inverted output of the first flip-flop and an output of the second flip-flop. The second synchronizing pulse is produced taking the trailing edge of the vertical synchronizing signal separated from the composite synchronizing signal as a reference and thus functions as a stable vertical synchronizing signal.

REFERENCES:
patent: 3575215 (1971-04-01), Boddy
patent: 3663883 (1972-05-01), Olso
patent: 3903356 (1975-09-01), Watatani
patent: 3925613 (1975-12-01), Kokado
patent: 3962540 (1976-06-01), Kokado
A Fully Automatic Ghost Canceller, by Makino et al., Technical Research Laboratories of NHK, pp. 1 to 5.

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