Television – Synchronization – Sync separation
Patent
1998-10-13
2000-05-30
Peng, John K.
Television
Synchronization
Sync separation
348525, 348530, 348531, 348533, 375368, 375365, 375366, H04N 508, H04N 510, H04L 700
Patent
active
060696672
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a synchronizing signal detecting device for detecting synchronizing signals in digital broadcasting transmission such as digital CATV (cable television), communication satellite (CS) digital broadcasting and the like.
BACKGROUND ART
In digital-signal-transmission including digital CATV, CS digital broadcasting and the like, synchronizing signals, error-correcting codes, etc. are added to signals at the transmission side before the signals are transmitted. The synchronizing signal (hereinafter called "Sync signal"), among others, is essential for restoring the signals on a receiver side.
FIG. 7 depicts a format depicting a transmission sequence and placement of signal data in vestigial side band (VSB) transmission employed in the Advanced Television (ATV) in the U.S. A circuit for detecting this Sync signal (a segment Sync signal in this case) in digital signal transmission such as VSB transmission is illustrated as a prior art in FIG. 8. In the meantime, an interval between the adjacent Sync signals in FIG. 7 corresponds to 832 symbols.
In FIG. 8, the digital signals transmitted in the format of the VSB transmission are fed into an input terminal 100. The Sync signal included in this input digital signal "a" undergoes a pattern check section 2 where the Sync signal is checked whether its pattern is matched with the reference pattern of the synchronizing signal. In other words, this pattern check section 2 checks a signal pattern included in the segment Sync signal (corresponding to 4 symbols) with the predetermined reference pattern (corresponding to 4 symbols), and when they agree with each other, the pattern check section 2 outputs a high level signal "b". This output signal from the pattern check section 2 is fed into an agreement detection counter 3, disagreement detection counter 4 and Sync counter 6.
The agreement detection counter 3 counts how many signal patterns agree with the reference pattern in the pattern check section 2. In other words, when a timing signal "c" from the Sync counter 6 is fed into the agreement detection counter 3, which counts up one by one provided the output signal "b" from the pattern check section 2 is on a high level. When the count value reaches to "3", the counter 3 does not count up any more and stays at "3" even if the output signal "b" is at the high level. When the output signal "c" is fed into the counter 3, which is reset to "0" provided the output signal "b" from the pattern check section 2 is at a low level.
When the disagreement detection counter 4 receives the timing signal "c" from the Sync counter 6, it counts up one by one provided the output signal "b" from the pattern check section 2 is at the low level. When the counted value reaches to "3", the counter 4 does not count up any more and stays at "3" even if the output signal "b" is at the low level. When the output signal "c" is fed into the counter 4, the counter is reset to "0" provided the output signal "b" from the pattern check section 2 is at the high level.
A Sync detection determination section 5 determines a Sync detection based on the output signals from the counters 3 and 4. Namely, it outputs a high level signal "f" indicating a Sync detected status just when an output signal "e" from the counter 4 is changed to "0" while an output signal "d" from the counter 3 stays at "3". On the other hand, it outputs a low level signal "f" indicating a Sync non-detected status just when the output signal "e" from the counter 4 changes to "3" while the output signal "d" from the counter 3 is "0".
A necessary number of input Sync signals can be changed by resetting the count set values of the counters 3 and 4 as well as the set value of the Sync detection determination section 5.
The Sync counter 6 outputs a signal "c" that controls timings of the count operations of the counters 3 and 4 by using the output signal "b" from the pattern check section 2 and the output signal "f" from the Sync detection determination section 5. Namely, the Sy
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Search report corresponding to application No. PCT/JP98/00538 dated Apr. 21, 1998.
English translation of Form PCT/ISA/210.
Konishi Takaaki
Ueda Kazuya
Matsushita Electric - Industrial Co., Ltd.
Natnael Paulos
Peng John K.
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