Synchronizing pulse restoration circuit

Cryptography – Key management – Having particular key generator

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Details

358156, 358139, 380 17, H04N 7167, H04N 508

Patent

active

046672320

ABSTRACT:
A decoder for a television signal encrypted with randomly inverted video and randomly suppressed sync pulses includes inverting and noninverting amplifiers for inverting the inverted video and a sync pulse restoration circuit for restoring suppressed sync pulses, all under control of decoder logic. A comparator is coupled to the noninverting amplifier and changes its output voltage in the presence of signal portions extending beyond the mid sync level of the video signal. The output of the comparator is connected to the emitter of a transistor that has its collector supplied through a voltage divider load from a source of blanking level voltage. The junction of the voltage divider receives the decoded video signal. The transistor is driven conductive in response to flyback pulses, corresponding to the occurrence of sync pulses, applied to its base. The transistor conducts only during sync pulse intervals and the level of the decoded video signal during these intervals is brought to a common point, thus restoring all sync tips to the same height. For negative noise spikes, the transistor is not driven conductive and the level of the decoded video signal is held at blanking level.

REFERENCES:
patent: 4222068 (1980-09-01), Thompson
patent: 4257065 (1981-03-01), Papay
patent: 4396946 (1983-08-01), Bond
patent: 4590519 (1986-05-01), Zelenz

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