Pulse or digital communications – Spread spectrum – Direct sequence
Patent
1987-08-27
1989-01-24
Pellinen, A. D.
Pulse or digital communications
Spread spectrum
Direct sequence
375 53, 375 84, 358148, 358264, 358273, H04C 700
Patent
active
048005789
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to a synchronizing detecting circuit for a digital broadcasting receiver which is suitable for receiving, for example, a satellite broadcasting.
BACKGROUND ART
Generally in a satellite broadcasting, a 4-phase PSK modulation system is employed to digitally transmit various kinds of programs which can be selectively picked up at the reception side.
In this case, a sync. word formed of a plurality of plurality of simultaneous transmission channels and various kinds of program data are sequentially transmitted in a time-division manner within each frame.
In order to receive such satellite broadcasting, it is necessary to provide such a digital broadcasting receiver as shown in FIG. 1.
Referring to FIG. 1, there is shown a parabola antenna 1, and a received signal appearing at the output of the parabola antenna 1 is supplied through a first frequency converter 2, a second frequency converter 3 and an intermediate frequency amplifier 4 to a 4-phase PSK demodulator 5. The signal is demodulated by the 4-phase PSK demodulator 5 so as to provide digital data of a first channel and a second channel. These first channel digital data and second channel digital data developed at the output side of the 4-phase PSK demodulator 5 are supplied to a data decoder 6.
In the data decoder 6, a desired program can be selected from many kinds of programs. Digital data of the selected program is supplied to a digital-to-analog converter 7 and then reproduced through an output terminal 8 to an amplifier and a loudspeaker, though not shown.
By the way, the sync. words inserted into the beginning of each frame of the first and second channels are used to make the digital data of the first and second channels coincident with the contents of the transmission channel at the reception side positively and correctly. Accordingly, in order to select desired program data by the data decoder 6, the sync. words must be detected as the sync. words regardless of the arrangement thereof.
In the digital broadcasting receiver of this example, it is possible to positively and correctly match the digital data of first and second channels with the contents of transmission channel by detecting the sync. word of any one of the first and second channels.
To this end, in the prior art, a synchronizing detecting circuit shown in FIG. 2 is proposed as a synchronizing detecting circuit for a digital broadcasting receiver.
This synchronizing detecting circuit is adapted to detect a sync. word formed of digital data (11100010010), or a so-called Barker Code used by the satellite broadcasting in West Germany.
As illustrated in FIG. 2, there is provided a first channel serial digital data input terminal 10 which is supplied with first channel serial digital data derived from the output of the 4-phase PSK demodulator 5. The first channel serial digital data input terminal 10 is connected to the input side of a shift register 11. Of parallel data output terminals 11a, 11b, . . . , 11k of the shift register 11, first, second, third, seventh and tenth parallel data output terminals 11a, 11b, 11c, 11g and 11j are respectively connected to input terminals of an AND circuit 12. Also, fourth, fifth, sixth, eighth, ninth and eleventh parallel data output terminals 11d, 11e, 11f, 11h and 11k are respectively connected through inverters 13, 14, 15, 16, 17 and 18 to the input terminals of the AND circuit 12.
In the thus constructed synchronizing detecting circuit, only when the sync. word (11100010010) is supplied to the shift register 11, parallel digital data (11111111111) are supplied to the input terminals of the AND circuit 12 and a high level signal "1" can be obtained at an output terminal 19 of the AND circuit 12.
Accordingly, this high level signal "1" can be employed as a synchronizing detecting signal.
Such conventional synchronizing detecting circuit for the digital broadcasting receiver, however, can not obtain the synchronizing detecting signal if an error occurs in one bit of the bits forming the sync. word of
REFERENCES:
patent: 3766316 (1973-10-01), Hoffman et al.
patent: 4353130 (1982-10-01), Carasso et al.
patent: 4573171 (1986-02-01), McMahon, Jr. et al.
patent: 4638497 (1987-01-01), Komatsu et al.
Jennings Derek S.
Pellinen A. D.
Sony Corporation
LandOfFree
Synchronizing detecting circuit for a digital broadcasting recei does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Synchronizing detecting circuit for a digital broadcasting recei, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronizing detecting circuit for a digital broadcasting recei will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-423601