Synchronizing circuit for use in a digital audio signal compress

Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal

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375357, H04L 700

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active

056688407

ABSTRACT:
In a synchronizing circuit receiving a bit stream including a synchronous pattern and various kinds of information bits, for outputting a synchronous signal, there is provided a synchronous pattern register which is previously set with known information bits of the layer, the bit rate and the sampling frequency. A synchronous pattern detecting circuit is configured not to recognize as a synchronous pattern, a synchronous pattern having the values other than previously set values. With this arrangement, it is possible to remarkably reduce probability that a quasi synchronous pattern is detected as the synchronous pattern, and therefore, it is possible to minimize missing of sound corresponding to the digital audio signal.

REFERENCES:
patent: 4002845 (1977-01-01), Kaul et al.
patent: 5140618 (1992-08-01), Kinoshita et al.
patent: 5161171 (1992-11-01), Suzuki et al.
patent: 5303270 (1994-04-01), Fujii
patent: 5313500 (1994-05-01), Rikiyama
Maturi; "Single Chip MPEG Audio Decoder"; Aug. 1992; pp. 348-356; IEEE Transactions on Consumer Electronics No. 3 vol. 38.

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