Synchronizing circuit arrangement for deriving and processing a

Details Synchronizing circuit arrangement for deriving and processing a Synchronizing circuit arrangement for deriving and processing a

1982-09-29

1985-05-28

Chin, Tommy P.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358153, H04N 504

Patent

active

045203938

ABSTRACT:
A synchronizing circuit arrangement for deriving and processing a synchronizing signal contained in an incoming video signal. The composite synchronizing signal is obtained by means of a comparator stage to which the video signal and a clipping level are applied, and is applied to a line synchronizing circuit. This line synchronizing circuit comprises a synchronization detector for detecting the synchronized state between the line synchronizing pulses obtained and the locally generated pulses of the line frequency. In the synchronized state the peak level detector, by means of which the clipping level is derived, is switched to operate as a mean-value detector which is operative during the occurrence of keying pulses of line frequency occurring during those periods when the video signal assumes a value corresponding with the peak level of the synchronizing pulses.

REFERENCES:
patent: 4212032 (1980-07-01), Harford
patent: 4303939 (1981-12-01), Stephens et al.

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