Synchronizing circuit

Details Synchronizing circuit Synchronizing circuit

1997-09-16

2000-09-05

Chin, Stephen

Pulse or digital communications

Synchronizers

Self-synchronizing signal

375354, H04L 702

Patent

active

061154377

ABSTRACT:
A DSP 20 receives a serial audio signal DATi synchronized with a external clock .phi.i with the same cycle as that of the internal clock .phi.o and a LR identification signal LRi synchronized in units of words of the serial audio signal DATi, processes the serial audio signal LRi with synchronizing to the internal clock .phi.o and provides a serial audio signal DATo and a LR identification signal LRo. A DSP 20 includes a D flip-flop 11 for detecting and holding the rising edge of the LR identification signal LRi, and a counter 15 for counting the internal clock .phi.o after this detecting to provide the periodic LR identification signal LRo from its inverse output *Q. If signals DATi and LRi are multiple pairs with different frequencies, the DSP further includes selectors for selecting a pair signal from the signals DATi and LRi by a mode writing signal, and non-inverter for delaying the mode writing signal which is provided to clear inputs of the D flip-flop and the counter through an AND gate, to ignore the signal edge different from that of the signal LRi.

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