Synchronizing a packetized digital datastream to an output proce

Television – Miscellaneous

Patent

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Details

348500, 375357, H04N 764

Patent

active

058477799

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

This invention is related to the field of digital video signal processing, and more particularly to a system for maintaining packet alignment in a packetized data system suitable for use in a high definition television system.
Recent developments in the field of video signal processing and transmission include systems for digital high definition television processing and transmission. One such system is described in U.S. Pat. No. 5,168,356-Acampora et al. In that system, a codeword datastream, including codewords provided in accordance with the MPEG-2 data compression standard as is known, are conveyed to a transport processor. A major function of the transport processor is to pack variable length codeword data into packed data words. An accumulation of packed data words, called a data packet or data cell, is prefaced by a header which contains information for identifying the associated data words, among other information. Thus an output from the transport processor is a packetized datastream comprising a sequence of transport packets. The transport packet format enhances the prospects of resynchronization and signal recovery at a receiver, eg., after a signal disruption which may result from a transmission channel disturbance, by providing header data from which a receiver can determine re-entry points into the datastream upon the occurrence of a loss or corruption of transmitted data.
At the encoder/transmitter end of a system employing a packetized datastream format, an output modulator typically extracts data packets from a preceding encoder (transport processor) and processes this data in accordance with the requirements of the particular system. For example, processing by the modulator may include a variety of functions including error correction processing by appending Forward Error Correction (FEC) bytes to the packet boundaries, byte interleaving to protect against burst errors in the transmission medium, trellis (or other) coding for robustness, spectral shaping, and interleaving a resulting symbol datastream for additional burst error protection.
The modulator may operate in two ways for performing these functions. The modulator may acquire (request) data from the transport encoder packet by packet at a constant rate, or it may acquire packet data with variable length pauses between the acquisition of packets, with the variable length of each pause being a function of the time needed to accomplish the described processes. In the first case, the modulator must provide large data buffers to accomodate the data rate conversions during FEC and symbol creation, for example. These buffers must also be provided at a receiver demodulator. The latter variable pause technique is preferred because the large buffers are not required, and the start-stop nature of the processing is easily accomodated by existing compression and transport encoder networks without requiring additional hardware.
The modulator is the controlling element in the preferred variable pause system. In such case the modulator enables the transport datastream for receiving exactly one data packet, which is 188 bytes in the case of a system according to the MPEG-2 compression standard as is known. The data flow is inhibited to allow the FEC and other processes described above to be performed. To properly process the datastream packets in a system employing the MPEG-2 compression standard, for example, the first data received by the modulator in response to the data packet enable signal must be the sync byte since the sync byte denotes the start of a packet.


SUMMARY OF THE INVENTION

It is herein recognized that alignment of the start of a packet with the first byte interval of a modulator data enable signal which request data from the transport encoder is difficult without incorporating complicated interfaces with multi-level protocols. It is furthermore recognized that, even with such complicated interfaces, severe problems may occur when, for example, the system experiences a reset condition associated wit

REFERENCES:
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patent: 5038347 (1991-08-01), Courtois
patent: 5168356 (1992-12-01), Acampora et al.
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patent: 5565923 (1996-10-01), Zdepski
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patent: 5703887 (1997-12-01), Heegard et al.
patent: 5767912 (1998-06-01), Bunting et al.

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