Synchronizer having dual feedback loops for avoiding intermediat

Details Synchronizer having dual feedback loops for avoiding intermediat Synchronizer having dual feedback loops for avoiding intermediat

1988-06-20

1989-06-13

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307269, 307279, 307290, 307451, 307443, 328 63, 328 72, H03K 19096, H03K 329, H03K 513, H03K 19094

Patent

active

048395412

ABSTRACT:
A synchronizer is comprised of a voltage amplifier having an input terminal for receiving a voltage sample and an output terminal for generating an output voltage that is inversely proportional to the voltage of the input terminal. Also, a first feedback circuit couples the output terminal to a control transistor internal to the amplifier, and a second feedback circuit couples the output terminal to the input terminal. The first feedback circuit together with the control transistor has a fast response time, in comparison to the second feedback circuit; and it operates to quickly increase the output voltage when the voltage sample on the input terminal is below a predetermined level, and vice versa, without altering the voltage sample on the input terminal. And, the second feedback circuit operates to slowly modify the voltage sample on the input terminal in inverse proportion to the output terminal voltage.

REFERENCES:
patent: 3225301 (1965-12-01), McCann
patent: 3471790 (1969-10-01), Kaps
patent: 3612906 (1971-10-01), Kennedy
patent: 3873856 (1975-03-01), Gerlach et al.
patent: 3904888 (1975-09-01), Griffin et al.
patent: 3953744 (1976-04-01), Kawagoe
patent: 3983496 (1976-09-01), Bedford et al.
patent: 3984703 (1976-10-01), Jorgensen
patent: 4687954 (1987-08-01), Yasuda et al.

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