Synchronized input latch circuit with conditioning circuits for

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307361, 307364, 307241, 307242, 307243, 328 28, 328104, 328116, 328179, 328154, 328 63, 328 72, H03K 5153, H03K 1756, H03K 508, H03K 1700

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049163310

ABSTRACT:
An AC input conditioning circuit comprises a latch circuit, one or more latch conditioning channels, and a latch synchronizing circuit that is coupled to an AC source and has an output supplying a latch enable pulse to the latch enable terminal of the latch circuit only when the AC power signal exceeds predetermined latching threshold during alternate half cycles. The conditioning channel comprises an input coupled to a device whose on or off sense is to be detected, and an output coupled to a corresponding channel of the latch. Each conditioning channel can be comprised of a rectifier diode, followed by a zener diode and a driver amplifier.

REFERENCES:
patent: 4638181 (1987-01-01), Deiss
patent: 4692633 (1987-09-01), Ngai et al.
patent: 4713623 (1987-12-01), Mower et al.
patent: 4726015 (1988-02-01), Nirschl
patent: 4766602 (1988-08-01), Wilkinson et al.

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