Synchronized frequency multiplier for multiple phase PWM...

Details Synchronized frequency multiplier for multiple phase PWM... Synchronized frequency multiplier for multiple phase PWM...

2006-07-11

2006-07-11

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

C327S091000, C327S094000, C327S235000, C327S295000, C327S077000, C327S078000

Reexamination Certificate

active

07075346

ABSTRACT:
A method and circuit for synchronizing an input clock signal with a plurality of internal clock signals in a multiple phase Pulse Width Modulation (PWM) switching power supply without using a Phase Locked Loop (PLL). A period of the input clock signal is measured by using a frequency to voltage converter. A reference capacitor charged by a constant current source is arranged to generate a reference voltage with a slope based on the period of the input clock signal. A change in the reference voltage across the reference capacitor is substantially inversely proportional to a frequency of the input clock. By providing the reference voltage to a sample-and-hold circuit and using an output of the sample-and-hold circuit to feed a comparator, synchronization may be accomplished. Each internal clock signal is generated by different reference capacitor and current source circuit.

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