Synchronized clock signal regenerating circuit

Details Synchronized clock signal regenerating circuit Synchronized clock signal regenerating circuit

1995-09-25

1997-05-20

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327163, H03L 706

Patent

active

056315902

ABSTRACT:
A clock signal regenerating circuit includes a first PLL circuit, a PLL part circuit which forms a second PLL circuit in cooperation with the first PLL circuit, the second PLL circuit performing a frequency-synchronizing operation on a clock signal and a data signal. The first PLL circuit performs a phase-synchronizing operation on the clock signal and an output signal of the PLL part circuit. The phase-synchronizing operation has a speed lower than that of the frequency-synchronizing operation.

REFERENCES:
patent: 4787097 (1988-11-01), Rizzo
patent: 4803705 (1989-02-01), Gillingham et al.
patent: 4987373 (1991-01-01), Soo
patent: 5015970 (1991-05-01), Williams et al.
patent: 5302916 (1994-04-01), Pritchett
patent: 5304954 (1994-04-01), Saito et al.
patent: 5487093 (1996-01-01), Adresen et al.
patent: 5493243 (1996-02-01), Ghoshal

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