Synchronization signal detector, synchronization signal detectin

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341 59, 375366, H03M 1300, H03M 740

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active

055374220

ABSTRACT:
A synchronization detector includes a NRZI circuit for extracting edge portions of RF signals detected as binary-valued signals to form a pulse train, a counter for counting the number of channel clocks in the distance between transitions represented by the edge portions, a latch circuit operated responsive to pulses from the NRZI circuit for holding a number of previously counted channel clocks immediately preceding a current count of channel clocks, and AND gates and an OR gate for detecting synchronization signals when the combination of the channel clocks from the counter and the latch circuit is the combination of the maximum distance between transitions Tmax and Tmax-kT (k=1 or 2) of a (d, k; m, n; r) modulation code. Synchronization signals may be detected promptly even if the frame structure is increased in size to enable restoration of synchronization to be expedited when frame structure synchronization is not in order. A demodulator utilizing the synchronization signal detector is also disclosed.

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Patent Abstracts Of Japan, vol. 11, No. 70 (E-485) (2517), 3 Mar. 1987 & JP-A-61 225 920 (Toshiba) 7 Oct. 1986.

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