Synchronization of digital signals with alternating current

Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Having phase shift

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377 44, 328 72, 328155, 375118, H03L 500, H03L 700

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active

049612077

ABSTRACT:
A circuit for synchronizing digital signals with alternating current includes a first counter that repetitively starts a first counting sequence at a predetermined phase point in each AC line cycle and effects the sequence at a high frequency rate thereby generating a total count during each line cycle. The total count is then divided by a dividing integer to produce a count number. A second counter repetitively starts a second counting sequence at the predetermined phase point and effects the second sequence at the high frequency rate up to the count number continuously during each line cycle. A decoder responsive to the second counter produces a digital output signal at one or more predetermined points in preselected second counting sequences during each line cycle.

REFERENCES:
patent: 3987422 (1976-10-01), Yanacidaira et al.
patent: 4168910 (1979-09-01), Barnard
patent: 4206414 (1980-06-01), Chapman
patent: 4339722 (1982-07-01), Sydor et al.
"Phase-Locked Loop Design Fundamentals", by Garth Nash, Application Note AN-535, Motorala Inc. (1970).

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