Synchronization of digital memory with TV signal having interlac

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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358147, 358183, 358153, H04N 522, H04N 708, H04N 504

Patent

active

042813450

ABSTRACT:
The aim of the present invention is to make it possible to synchronize a digital memory with an existing TV-system, in which a TV-picture is transmitted with video interlace. According to the invention a corrected field synchronizing pulse is formed by means of a composite sync signal of the TV-system, which pulse, in spite of the video interlace, always appears at the starting point of a line and by means of which a part in an address counter for the memory associated with vertical addressing of the memory is reset to a starting position at the starting point of each picture field. The address counter is stepped for addressing purposes by means of a clock signal from a main oscillator, the frequency of which is controlled in response to a comparison between a line synchronizing signal derived from the composite sync signal and line frequency signals supplied from the address counter.

REFERENCES:
patent: 3898377 (1975-08-01), Fairbairn et al.
patent: 3982064 (1976-09-01), Barnaby

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