Synchronization detection architecture for serial data...

Pulse or digital communications – Repeaters

Reexamination Certificate

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C375S368000, C375S372000

Reexamination Certificate

active

07042932

ABSTRACT:
A method includes receiving an indication of incoming data from a first serial bus and buffering the bits to accommodate a difference between a first rate of the incoming data and a second rate of outgoing data. During the buffering, the method includes detecting if at least some of the bits indicate a synchronization field.

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patent: 5357542 (1994-10-01), Suzuki
patent: 5493589 (1996-02-01), Ibenthal
patent: 5497187 (1996-03-01), Banker et al.
patent: 5671249 (1997-09-01), Andersson et al.
patent: 5790610 (1998-08-01), Julyan
patent: 5956377 (1999-09-01), Lang

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