Synchronization control unit which maintains synchronization bet

Details Synchronization control unit which maintains synchronization bet Synchronization control unit which maintains synchronization bet

1997-01-24

1998-09-15

Young, Brian K.

Coded data generation or conversion

Digital code to digital code converters

Serial to parallel

341101, H03M 900

Patent

active

058085718

ABSTRACT:
A synchronization control unit for synchronizing serial-to-parallel (S/P) converters operating in parallel, or parallel-to-serial (P/S) converters operating in parallel. More specifically, first and serial-to-parallel (S/P) converters produce respectively corresponding first and second clock signals and operate in parallel. The first and second clock signals are in synchronization, and a synchronization failure occurs when the first and second clock signals fall out of synchronization. When a synchronization failure occurs, the synchronization control unit resets one of the first and second clock signals so that synchronization between the first and second clock signals is restored within a definite time period. Moreover, the synchronization control unit can perform the same operation with parallel-to-serial (P/S) converters, instead of with S/P converters.

REFERENCES:
patent: 5442405 (1995-08-01), Taniguchi et al.

Affiliated with

Also associated with

Rating

Synchronization control unit which maintains synchronization bet does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Synchronization control unit which maintains synchronization bet, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronization control unit which maintains synchronization bet will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-92623