Synchronization code detecting apparatus for cell search in...

Details Synchronization code detecting apparatus for cell search in... Synchronization code detecting apparatus for cell search in...

2007-03-06

2007-03-06

Ghebretinsae, Temesghen (Department: 2611)

Pulse or digital communications

Spread spectrum

Direct sequence

C375S142000, C375S143000, C375S149000, C375S150000, C375S152000

Reexamination Certificate

active

10324296

ABSTRACT:
A synchronization code detecting apparatus is designed for synchronization code detection in cell search in a code division multiple access (CDMA) system. The synchronization code detecting apparatus mainly includes a compensation unit for providing frequency offset compensation to the incoming signal and for determining a plurality of sampling points of the incoming signal. A plurality of sub-detecting units is coupled to the compensation unit for detecting a synchronization code of the incoming signal transmitting from the compensation unit. A selection unit is coupled to the output of each sub-detecting unit for selecting a plurality of slot boundaries as a plurality of candidates to be forwarded to a second processing stage. Consequently, the synchronization code detecting apparatus effectively reduces the effect of clock offset in the system without increasing the hardware complexity and power consumption.

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Shenn, “Cell search for 3GPP W-CDMA/FDD with chip clock shift and non-ideal sampling” Vehicular Technology Conference, 2001. VTC 2001 Fall, IEEE VTS 54th vol. 4, Oct. 7-11, 2001, pp. 2369-2373 vol. 4).

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