Synchronization circuit responsive to time-multiplexed signals

Details Synchronization circuit responsive to time-multiplexed signals Synchronization circuit responsive to time-multiplexed signals

1985-12-24

1987-04-21

Groody, James J.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358148, 331 18, 331 20, H04N 504, H03L 700

Patent

active

046600809

ABSTRACT:
A phase-lock loop circuit of a television apparatus is synchronized by a horizontal synchronizing input signal. The phase-lock loop circuit includes a frequency-to-voltage converter that is responsive, during vertical trace, to the synchronizing input signal for generating a control voltage indicative of the frequency of the synchronizing input signal. During vertical trace, the control voltage varies the free running frequency of a controlled oscillator of the phase-lock loop circuit such that the free running frequency of the oscillator is directly related to the frequency of the input signal. During vertical retrace, the frequency-to-voltage converter is responsive to the oscillator output signal for generating the control signal that maintains the free running frequency of the oscillator substantially unchanged during vertical retrace. The phase of the output signal of the oscillator is controlled by a signal that is indicative of the phase difference between the oscillator output signal and the synchronizing input signal.

REFERENCES:
patent: 3074027 (1963-01-01), Rout
patent: 3990107 (1976-11-01), Hanma et al.
patent: 4093963 (1978-06-01), Uchida
patent: 4144544 (1979-03-01), Fernsler
patent: 4245251 (1981-01-01), Steckler et al.
patent: 4251833 (1981-02-01), Fernsler et al.
patent: 4363003 (1982-12-01), Osaka et al.

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