Synchronization between low frequency and high frequency...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C375S354000

Reexamination Certificate

active

07061286

ABSTRACT:
A synchronization circuit for synchronizing low frequency digital circuitry and high frequency digital circuitry. The synchronization circuit produces an ordered series of clocks from the high-frequency digital clock. The clocks have a deterministic time relationship, with at least one clock having a period longer than the timing uncertainty associated with a synchronization signal. The synchronization signal is passed through a chain of latches, each one clocked by one of the divided down clocks with successively higher frequency. These latches align the synchronization signal with the clocks produced by the clock divider, ultimately aligning the synchronization signal with the high frequency clock. This synchronization circuit is described in connection with automatic test equipment used in the manufacture of semiconductor devices.

REFERENCES:
patent: 4059842 (1977-11-01), Meacham
patent: 4110701 (1978-08-01), Medwin
patent: 5256912 (1993-10-01), Rios
patent: 5510732 (1996-04-01), Sandhu
patent: 5588004 (1996-12-01), Suzuki et al.
patent: 6188253 (2001-02-01), Gage et al.
patent: 6359479 (2002-03-01), Oprescu

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