Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal
Reexamination Certificate
2000-07-12
2003-02-25
Pham, Chi (Department: 2631)
Pulse or digital communications
Synchronizers
Frequency or phase control using synchronizing signal
C375S261000, C370S203000, C370S206000
Reexamination Certificate
active
06526107
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a synchronization acquiring circuit, and more specifically relates to a synchronization acquiring circuit used for a receiver to receive a digital modulated signal whose necessary C/N (carrier-power-to-noise power ratio) is transmitted according to a plurality of different modulation systems, for example.
BACKGROUND ART
A hierarchical transmission system in which digital modulated signals whose necessary C/N is transmitted according to a plurality of different modulation systems, for example, 8PSK modulation, QPSK modulation and BPSK modulation are combined in a certain time unit and repeatedly transmitted for each frame is known. Here, the part of a modulated signal corresponding to the least number of levels of the modulated signal used in the transmission signal means the part with fewer phases and more specifically corresponds to the BPSK modulation part. A broadcasting receiver that receives a digital modulated signal according to such a hierarchical transmission system is equipped with a synchronization acquiring circuit that acquires synchronization by detecting a frame synchronization pattern from the demodulated baseband signal (hereinafter, the baseband signal is also referred to as “symbol stream”) and detecting coincidence with a predetermined synchronization pattern and its periodicity, and the synchronization is regarded as established when coincidence is detected consecutively at predetermined times.
In this case, assume that a frame synchronization pattern is regarded as detected when a reception frame synchronization pattern completely coincides with the predetermined transmission frame synchronization pattern and its period also coincides. Then, if the C/N is approximately 0 dB, the bit error rate (BER) of a BPSK modulation signal is on the order of the (−1)st power of 1×10, and therefore errors of approximately 2 bits frequently occur in the reception frame synchronization pattern made up of 20 symbols, and thereby there is a problem of making it difficult to detect coincidence between the reception frame synchronization pattern and the predetermined transmission frame synchronization pattern.
Moreover, even if it is not possible to reproduce a carrier in a burst-like manner from the BPSK modulating section (including the burst symbol signal which will be described later), for example, because of the configuration of the hierarchical transmission system in which the frame synchronization pattern is formed at the start of a frame, there may be cases where there are carrier error frequencies at which frame synchronization patterns in demodulated data are detected and these are erroneously detected as frame synchronization. This results in a problem that synchronization is erroneously regarded as established although the carrier is not reproduced.
It is an objective of the present invention to provide a synchronization acquiring circuit for stably acquiring frame synchronization without any pseudo-synchronization lock during reception at a low C/N.
DISCLOSURE OF THE INVENTION
The synchronization acquiring circuit according to the present invention comprises:
synchronization detection means for detecting a reception frame synchronization pattern from a demodulated baseband signal;
C/N determining means for determining a C/N value of a transmission path from the demodulated baseband signal;
correlation detection reference value calculating means for outputting as a correlation detection reference value the number of bits in the reception frame synchronization pattern that coincides with those of a frame synchronization pattern on a transmitting side that can detect and maintain synchronization based on the determined C/N value;
coincided bit number calculation means for comparing the bits of the reception frame synchronization pattern detected by the synchronization detecting means with those of the frame synchronization pattern on the transmitting side and for determining the number of coincided bits;
comparison means for outputting a frame synchronization pattern detection signal when the number of bits determined by the coincided bit number calculation section is equal to or larger than the correlation detection reference value;
first detection means for detecting that a frame synchronization pattern detection signal by the comparison means is output for every one frame period; and
second detection means for detecting that a signal, which is received by using a part of a predetermined modulated wave of modulated means used in a transmission signal, has a quality equal to or higher than a predetermined quality, wherein synchronization is regarded as established when the first detection means detects frame synchronization and the second detection means detects that the reception signal has at least a certain quality.
In the synchronization acquiring circuit according to the present invention, the C/N determining means determines the C/N value of a transmission path and a correlation detection reference value is changed on the basis of the determined C/N value. On the other hand, the synchronization pattern of a received frame is detected by the synchronization detection means. The bits of the synchronization pattern of the received frame are compared with those of a frame synchronization pattern on the transmitting side by the coincided bit number calculating means to determine the number of coincided bits. The frame synchronization is regarded as detected when the determined number of bits is equal to or larger than the correlation detection reference value. When the first detection means detects frame synchronization for every one-frame period and the second detection means detects that the signal received by using the predetermined modulated signal part of the modulation signal used in the transmission signal has at least a predetermined quality, synchronization is regarded as established.
Therefore, in the synchronization acquiring circuit according to the present invention, a correlation detection reference value is changed on the basis of the reception condition, the bits of the synchronization pattern of the received frame are compared with the corresponding bits of a frame synchronization pattern on the transmitting side to determine the number of coincided bits, the frame synchronization is regarded as detected when the determined number of bits is equal to or larger than the changed correlation detection reference value, and the corresponding synchronization is detected for every frame period, and synchronization is regarded as established when it is detected that the signal received by using the predetermined modulated signal part of the modulation signal used in the transmission signal has at least a predetermined quality, and therefore it is possible to detect and maintain synchronization even at a low C/N for stably acquiring synchronization.
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English Translations of Portions of the Cited Documents Related with the Claims 1 to 3 of the U.S. Patent Application.
Search Report, Japanese Patent Office, Feb. 23, 1999.
Hashimoto Akinori
Horii Akihiro
Katoh Hisakazu
Shiraishi Kenichi
Al-Beshrawi Tony
Kabushiki Kaisha Kenwood
Pham Chi
Robinson Eric J.
Robinson Intellectual Property Law Office P.C.
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