Television – Synchronization – Sync separation
Reexamination Certificate
1998-09-15
2001-07-10
Eisenzopf, Reinhard J. (Department: 2614)
Television
Synchronization
Sync separation
C348S521000, C348S529000, C348S531000, C348S500000
Reexamination Certificate
active
06259485
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a sync separating circuit for extracting a sync signal of a video signal and, more particularly, to a sync separating circuit to extract a sync signal from a digital video signal.
2. Description of the Related Art
As shown in
FIG. 1
, according to a conventional sync separating circuit, a video signal is clamped, the clamped video signal is sliced by a predetermined level, and a sync signal is separated by the amplitude separation (for example, JP-A-6-253170).
That is, in
FIG. 1
, a video signal is supplied to an input terminal
51
. The video signal from the input terminal
51
is supplied to a clamping circuit
52
. In the clamping circuit
52
, the video signal is clamped so that, for example, a sync chip level of the video signal is made constant. An output of the clamping circuit
52
is supplied to a slice circuit
53
. A level that is slightly higher than the sync chip level of the video signal is set as a slice level th into the slice circuit
53
. In the slice circuit
53
, the level of the video signal is compared with the slice level th.
When the inputted video signal lies within a video period of time, the output level of the clamping circuit
52
is higher than the threshold level th. In a period of time of the sync signal, the output level of the clamping circuit
52
is lower than the threshold level th. Thus, the sync signal can be extracted from the inputted video signal. The sync signal which is outputted from the slice circuit
53
is taken out from an output terminal
54
.
In recent years, to realize a small size, a light weight, and low costs of a set, a video signal processing circuit is digitized and arranged on an integrated circuit. A circuit for directly digitizing the video signal and separating a sync signal from the digital video signal is considered.
In case of extracting the sync signal from the analog video signal as mentioned above, the sync chip level of the video signal is clamped and sliced by a slice level that is slightly higher than the sync chip level, so that the sync signal can be separated. However, in the case where the video signal which is not clamped is directly digitized and processed, since the sync chip level fluctuates, it is difficult to accurately extract the sync signal.
Therefore, as shown in
FIG. 2A
, for example, there is considered a method whereby a minimum value S
1
of the video signal is detected and a slice level formed on the basis of the minimum value S
1
of the video signal is compared with the video signal, thereby extracting the sync signal. Since the sync chip level of the sync signal is equal to the minimum value of the video signal, if the minimum value of the video signal is detected and the slice level is formed as mentioned above, the slice level can be set to a level that is slightly higher than the sync chip level of the sync signal. Thus, the sync signal can be extracted.
However, as shown in
FIG. 2B
, particularly, in a reception signal at a place of a weak electric field or a reproduction signal from a tape in which the dubbing was repeated, there is a case where a noise N which drops to a low level is generated in the video signal. If the slice level is formed on the basis of a minimum value S
2
of the video signal, the slice level is equal to or less than the sync chip level due to an influence by the noise N which drops lower as mentioned above, so that a problem occurs such that the sync signal cannot be extracted from the video signal.
OBJECTS AND SUMMARY OF THE INVENTION
It is, therefore, an object of the invention to provide a sync signal separating circuit which can certainly extract a sync signal from a digital video signal without being influenced by a noise.
According to the invention, there is provided a sync separating circuit comprising: holding means for holding a level based on a sync chip level; detecting means for comparing the slice level held in the holding means with a minimum value of a present video signal and outputting a detection signal when the minimum value of the present video signal is lower than the level held in the holding means; updating means for updating the level in the holding means on the basis of the minimum value of the present video signal when it is detected by the detecting means that the minimum value of the present video signal is lower than the level held in the holding means; and slice means for setting a slice level on the basis of the level in the holding means, slicing the video signal, and extracting a sync signal, characterized in that the slice level is allowed to gradually approach the sync chip level of the video signal by the updating means.
According to the invention, the updating means updates the level in the holding means by an intermediate value between the level held in the holding means and the minimum value of the present video signal.
According to the invention, mask means for inhibiting the updating of the level in the holding means for a predetermined time after the updating of the level in the holding means was executed for a predetermined period of time is further provided.
According to the invention, level-up means for increasing the level held in the holding means at a predetermined rate is further provided.
The value held as a sync chip level is compared with the minimum value of the present video signal and, when it is detected that the video signal at the present time point is lower than the holding level, it is updated to a new level by the intermediate value between the level held so far and the minimum value of the video signal at that time. By a series of those operations, the holding level gradually approaches the sync chip level of the actual video signal. By setting the slice level on the basis of such a level and by slicing the video signal, the sync signal can be certainly detected.
By inhibiting the updating of the level for a predetermined time after the updating of the holding level was performed for a predetermined period of time, the influence by noises for a video image period of time is eliminated.
By increasing the holding level at a predetermined rate, even if the signal level decreases to the sync chip level or less due to a sag, the holding level gradually approaches the sync chip level.
The above, and other, objects, features and advantage of the present invention will become readily apparent from the following detailed description thereof which is to be read in connection with the accompanying drawings.
REFERENCES:
patent: 4185299 (1980-01-01), Harford
patent: 4357629 (1982-11-01), McGinn
patent: 4385319 (1983-05-01), Hasegawa
patent: 4580166 (1986-04-01), Okano
patent: 4616270 (1986-10-01), Nishimoto
patent: 4691248 (1987-09-01), Nishimoto
patent: 4707740 (1987-11-01), Stratton
patent: 4723165 (1988-02-01), Bart
patent: 5486867 (1996-01-01), Hsu et al.
patent: 5528303 (1996-06-01), Bee et al.
patent: 5596372 (1997-01-01), Berman et al.
patent: 5754250 (1998-05-01), Cooper
patent: 5818538 (1998-10-01), Kim
patent: 5953069 (1999-09-01), Bruins et al.
patent: 4127120 (1993-02-01), None
patent: 6-253170 (1994-09-01), None
Desir Jean W.
Eisenzopf Reinhard J.
Kananen Ronald P.
Rader Fishman & Grauer
Sony Corporation
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