Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal
Patent
1996-07-24
1999-05-04
Tse, Young T.
Pulse or digital communications
Synchronizers
Frequency or phase control using synchronizing signal
375343, 36472803, 377 64, H04L 700
Patent
active
059011890
ABSTRACT:
A symmetrical correlator includes a shift register into which the bit pattern resulting from oversampling a received data signal are clocked using a sample clock. During each cycle of the sample clock, a first number of the bits contained in the shift register are provided to an enable circuit. The enable circuit compares these bits to a predetermined bit pattern and, in response to the correlation therebetween, generates an enabling signal. Also during each cycle of the sample clock, a plurality of bit pairs symmetrical about a predetermined bit position in the shift register are compared for logical equivalency in a plurality of associated logical equivalency circuits. Each of the logic equivalency circuits provides a signal indicative of the logic equivalency of its associated bit pair to an adder. When enabled, the adder sums the binary values provided thereto by the logical equivalency circuits to generate a signal SUM indicative of the degree of symmetry of the bit pattern contained in the shift register about the predetermined bit position for that clock cycle. A peak value for the signal SUM indicates the center of the bit interval of the data signal is precisely associated with the predetermined bit position of the shift register.
REFERENCES:
patent: 3851101 (1974-11-01), En et al.
patent: 3887769 (1975-06-01), Cichetti, Jr. et al.
patent: 4660164 (1987-04-01), Leibowitz
patent: 4903225 (1990-02-01), Brost
Kwok Edward C.
National Semiconductor Corporation
Tse Young T.
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