Computer graphics processing and selective visual display system – Computer graphic processing system – Interface
Reexamination Certificate
2002-11-25
2004-04-06
Tung, Kee M. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphic processing system
Interface
C345S502000
Reexamination Certificate
active
06717581
ABSTRACT:
COPYRIGHT NOTICE
Contained herein is material that is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction of the patent disclosure by any person as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all rights to the copyright whatsoever.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to graphics subsystems in personal computers. More particularly, the invention relates to an upgrade solution for an integrated graphics controller and various Accelerated Graphics Port (AGP) protocol modifications to provide symmetric capabilities to both AGP targets and AGP masters.
2. Description of the Related Art
All modem personal computers (PCs) contain a graphics subsystem. Through the years, this subsystem has increased in sophistication to the point that 2D acceleration, 3D acceleration, and video functions are considered standard in all PCs. The usage model of a 3D graphics controller exhibits a very asymmetric traffic pattern. The processor tends to deliver commands to the graphics controller by writing directly to it or by writing command buffers in memory. While the command traffic may be a fairly large amount of traffic in an absolute sense, it is a small percentage of the total traffic between the core logic chipset and the graphics controller. Most of the traffic is a result of the graphics controller initiating access to and interfacing with main memory. Typically, the graphics controller is reading from main memory. For example, the graphics controller may access texture information directly from main memory or swap in the next chunk of geometry. In order to keep the complexity of the definition down, the Accelerated Graphics Port (AGP) specification defines a “port” capable of supporting only two active device, an initiator (or master) and a target, having asymmetric capabilities.
While traditionally, in order to preserve flexibility, the graphics controller has been implemented as a discreet component, it has been found that integrating the graphics controller with the North Bridge of the core logic chipset can produce solutions with better price/performance ratios. Such integration, however, removes flexibility in the selection of the graphics subsystem. Since motherboard and system vendors commonly use the graphics subsystem as an area to differentiate their systems and the graphics subsystem is one of the most rapidly changing areas within PCs, it is important to retain an upgrade path for any graphics subsystem design.
In a system employing Accelerated Graphics Port (AGP) enabled devices, as illustrated in
FIG. 1A
, upgrading the graphics subsystem presently requires a system's existing graphics controller to be disabled in favor of an upgraded graphics controller residing on an add-in card. The system of
FIG. 1A
includes a chipset
110
that acts as the target of AGP requests from motherboard graphics
130
. The chipset
110
and motherboard graphics
130
communicate by way of an AGP bus
111
. Also coupled to the AGP bus
111
is an AGP connector
120
. The AGP connector
120
provides an upgrade path for the motherboard graphics
130
by allowing installation of an expansion card. However, because the AGP protocol was developed without the concept of a three load bus, only two devices, an AGP master and an AGP target, may be enabled at a time.
Consequently, as illustrated in
FIG. 1B
, when an AGP expansion card
140
is installed, it replaces the existing AGP graphics controller
130
which must be disabled and therefore becomes dormant. In a system employing an integrated graphics controller, such an upgrade mechanism would result in a significant waste of resources as the integrated graphics controller may easily represent over a million gates.
BRIEF SUMMARY OF THE INVENTION
According to one embodiment of the present invention, an Accelerated Graphics Port (AGP) master may initiate a data transaction. A graphics controller receives an AGP transaction request from a core logic device. The graphics controller buffers the AGP transaction request in a request queue. Then, the graphics controller initiates a data transaction in response to the AGP transaction request.
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Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Tung Kee M.
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