Symmetric edge true/complement buffer/inverter and method theref

Details Symmetric edge true/complement buffer/inverter and method theref Symmetric edge true/complement buffer/inverter and method theref

1991-01-25

1992-08-18

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307480, 307481, 307262, 307582, 328 63, H03K 513, H03K 1900

Patent

active

051401746

ABSTRACT:
The present invention is directed to a buffer/inverter which generates symmetric and complementary output signals from a single input signal. The device employs four inverters having similar switching speeds. The true output signal is generated by passing the input signal through two inverters. The complement output signal is generated by passing the true output signal through a third inverter, passing the input signal through a fourth inverter and coupling the outputs of the third and fourth inverters.

REFERENCES:
patent: 4074148 (1978-02-01), Sato
patent: 4130768 (1978-12-01), Bula et al.
patent: 4149099 (1979-04-01), Nagami
patent: 4529896 (1985-07-01), Grandguillot et al.
patent: 4547684 (1985-10-01), Pechar
patent: 4783604 (1988-11-01), Ueno
patent: 4950920 (1990-08-01), Hara et al.

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