Static information storage and retrieval – Interconnection arrangements – Transistors or diodes
Reexamination Certificate
2011-08-16
2011-08-16
Pham, Ly D (Department: 2827)
Static information storage and retrieval
Interconnection arrangements
Transistors or diodes
C365S177000, C365S189060
Reexamination Certificate
active
08000124
ABSTRACT:
A symmetrical blocking transient voltage suppressing (TVS) circuit for suppressing a transient voltage includes an NPN transistor having a base electrically connected to a common source of two transistors whereby the base is tied to a terminal of a low potential in either a positive or a negative voltage transient. The two transistors are two substantially identical transistors for carrying out a substantially symmetrical bi-directional clamping a transient voltage. These two transistors further include a first and second MOSFET transistors having an electrically interconnected source. The first MOSFET transistor further includes a drain connected to a high potential terminal and a gate connected to the terminal of a low potential and the second MOSFET transistor further includes a drain connected to the terminal of a low potential terminal and a gate connected to the high potential terminal.
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Alpha & Omega Semiconductor, Ltd
Bo-In Lin
Pham Ly D
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