Symbol synchronization circuit

Details Symbol synchronization circuit Symbol synchronization circuit

1989-08-25

1992-04-07

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

375119, H04L 702, H04L 7033

Patent

active

051034654

ABSTRACT:
An improved symbol synchronization circuit is provided for generting a clock signal in a receiver having an input signal comprising a stream of symbols at a symbol rate of f.sub.symbol. According to the invention, a correlator is provided that operates on a multiplicity (k) of multi-phase signals, .phi..sub.1 -.phi..sub.k, each signal more or less synchronized with the stream of symbols and each having a frequency f.sub.clock generally equal to a multiple of f.sub.symbol. Based on the current synchronization of each signal .phi..sub.1 -.phi..sub.k with the stream of symbols, and also based on the past history of the synchronization of each signal with the stream of symbols, one member from the group of signals .phi..sub.1 -.phi..sub.k is periodically selected as the clock signal. This selected clock signal is then delayed to compensate for the drift between f.sub.symbol and f.sub.clock.

REFERENCES:
patent: 4841551 (1989-06-01), Avaneas
patent: 4847876 (1989-07-01), Baumbach et al.

Affiliated with

Also associated with

Rating

Symbol synchronization circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Symbol synchronization circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Symbol synchronization circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1901290