Switching voltage regulator that adjusts a timing in...

Details Switching voltage regulator that adjusts a timing in... Switching voltage regulator that adjusts a timing in...

2000-01-31

2001-05-15

Wong, Peter S. (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S284000, C323S285000

Reexamination Certificate

active

06232755

ABSTRACT:

BACKGROUND
The invention generally relates to a voltage regulator, such as a switching voltage regulator, that adjusts a timing in response to a load transient.
A DC-to-DC voltage regulator typically is used to convert a DC input voltage to either a higher or a lower DC output voltage. One type of voltage regulator is a switching regulator that is often chosen due to its small size and efficiency. The switching regulator typically includes one or more switches that are rapidly opened and closed to transfer energy between an inductor (a stand-alone inductor or a transformer, as examples) and an input voltage source in a manner that regulates the output voltage.
As an example, referring to
FIG. 1
, one type of switching regulator is a Buck switching regulator
10
that receives an input DC voltage (called V
IN
) and converts the V
IN
voltage to a lower regulated output voltage (called V
OUT
) that appears at an output terminal
11
. To accomplish this, the regulator
10
may include a switch
20
(a metal-oxide-semiconductor field-effect-transistor (MOSFET), for example) that is operated (via a voltage called V
SW
) in a manner to regulate the VOUT voltage, as described below.
Referring also
FIGS. 2 and 3
, in particular, the switch
20
opens and closes to control energization/de-energization cycles
19
(each having a constant duration called T
S
) of an inductor
14
. In each cycle
19
, the regulator
10
asserts, (drives high, for example) the V
SW
voltage during an on interval (called T
ON
) to close the switch
20
and transfer energy from an input voltage source
9
to the inductor
14
. During the T
ON
interval, a current (called I
L
) of the inductor
14
has a positive slope. During an off interval (called T
OFF
) of the cycle
19
, the regulator
10
deasserts (drives low, for example) the V
SW
voltage to open the switch
20
and isolate the input voltage source
9
from the inductor
14
. At this point, the level of the I
L
current is not abruptly halted, but rather, a diode
18
begins conducting to transfer energy from the inductor
14
to a bulk capacitor
16
and a load (not shown) that are coupled to the output terminal
11
. During the T
OFF
interval, the I
L
current has a negative slope, and the regulator
10
may close a switch
21
to shunt the diode
18
to reduce the amount of power that is otherwise dissipated by the diode
18
. The bulk capacitor
16
serves as a stored energy source that is depleted by the load, and additional energy is transferred from the inductor
14
to the bulk capacitor
16
during each T
ON
interval.
For the Buck switching regulator, the ratio of the T
ON
interval to the T
OFF
interval, called a duty cycle, generally governs the ratio of the V
OUT
to the V
IN
voltages. Thus, to increase the V
OUT
voltage, the duty cycle may be increased, and to decrease the V
OUT
voltage, the duty cycle may be decreased.
As an example, the regulator
10
may include a controller
15
(see
FIG. 1
) that regulates the V
OUT
voltage by using a fixed frequency, pulse width modulation (PWM) technique to control the duty cycle. In this manner, the controller
15
may include an error amplifier
23
that amplifies the difference between a reference voltage (called V
REF
) and a voltage (called V
P
(see FIG.
1
)) that is proportional to the V
OUT
voltage. Referring also to
FIG. 5
, the controller
15
may include a comparator
26
that compares the resultant amplified voltage (called V
C
) with a sawtooth voltage (called V
SAW
) and provides the V
SW
signal that indicates the result of the comparison. The V
SAW
voltage is provided by a sawtooth oscillator
25
and may have a constant frequency (i.e., 1/T
S
).
Due to the above-described arrangement, when the V
OUT
voltage increases, the V
C
voltage decreases and causes the duty cycle to decrease to counteract the increase in V
OUT
. Conversely, when the V
OUT
voltage decreases, the V
C
voltage increases and causes the duty cycle to increase to counteract the decrease in V
OUT
. The switching frequency (i.e., 1/T
S
) typically controls the magnitude of an AC ripple component (called V
RIPPLE
(see FIG.
4
)) of the V
OUT
voltage, as a higher switching frequency typically reduces the magnitude of the V
RIPPLE
voltage.
The regulator
10
may be part of a computer system and thus, may be used to provide power to components, such as a microprocessor, of the computer system. Because of the ever-increasing operating frequency and power requirements of the microprocessor, the microprocessor may consume a significant amount of power. When the power that is demanded by the microprocessor suddenly increases, giving rise to a transient condition, the voltage that is supplied by the regulator
10
may tend to decrease below an acceptable range of voltages. To prevent this from occurring, the computer system may include a significant amount of decoupling capacitors (not shown) to prevent the voltage that supplies the microprocessor from substantially decreasing when the output load of the regulator
10
suddenly changes. Without the decoupling capacitors, the voltage supplied to the microprocessor may drop below an acceptable level due to the above-described PWM control. In this manner, when a significant load transient occurs, the control scheme may be within a dead time interval, a time interval in which the switch
20
is open, thereby preventing energy from being transferred from the input source
9
to counteract the transient. In general, the response of the regulator
10
to a load transient is a function of the inductance of the inductor
14
. Although the current in the inductor
14
cannot change instantaneously when the switch
20
closes, in general, the smaller the inductance of the inductor
14
, the faster the regulator
10
may respond to counteract the transient. However, if the control scheme is within the dead interval, an additional time elapses in which the regulator
10
cannot respond to the transient.
For example, referring to
FIGS. 6 and 7
, the controller
15
(see
FIG. 1
) may generate pulse width modulated pulses
30
(via the V
SW
signal) to regulate the V
OUT
voltage for a given level (called I
CC—MIN
) of output current (called I
OUT
) of the regulator
10
. At time T
3
, the pulse
30
a
may end, thereby causing the switch
20
to open at time T
3
. However, also at time T
3
, the I
OUT
current may transition from the I
CC—MIN
level to a higher current level (called I
CC—MAX
). The controller
15
may not close the switch
20
until another switching cycle begins (and until another pulse
30
b
is generated) at time T
4
. Therefore, a dead time interval
32
may occur in which the switch
20
is open, a state of the regulator
10
that prevents the regulator
10
from immediately responding to the increased load.
The duration of the dead interval
32
may be reduced by coupling two of the regulators
10
in parallel and operating their switches
20
in a complementary fashion. However, this arrangement may also not respond fast enough to prevent a significant drop in the regulator's output voltage.
Thus, there is a continuing need for a switching regulator having an improved response to load transients.


REFERENCES:
patent: 5477132 (1995-12-01), Canter et al.
patent: 5747976 (1998-05-01), Wong et al.

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