Switching system

Multiplex communications – Wide area network – Packet switching

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370 94, H04Q 1104

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active

048130370

ABSTRACT:
A switching system using an asynchronous packet switching technique is provided wherein the packets may contain voice, data or video signals. The switching speed is increased through the use of a processor analyzing only specified packets, said processor being located out of the transmission path of the packets. The processor may process the specified packets at a lower speed than the transmission speed of the switching system. A header correction circuit is used to improve the quality of the transmission.

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IEEE Proceedings, vol. 127, Pt. E, No. 6, Nov. 1980, pp. 233--240.
Electronic Design, vol. 30, No. 21, Oct. 1982, pp. 193-200.
International Switching Symposium, May 7-11, 1979, Paris FR, Session 40A1, pp. 757-764.
International Switching Symposium, May 7-11, 1984, Florence IT Session 41B, Paper 1, pp. 1-7.
International Switching Symposium, Sept. 21-25, 1981, Montreal CA, Session 42B, Paper 5, pp. 1-7.
"Performance Analysis and System Design of a Variable Bit-Rate Hybrid Switch", by L. Gabrielli et al, Telecom '83, (4th World Telecommunication Forum), pp. 2.8.5.1-2.8.5.6.
"Design of Multiservice Variable Bit-Rate Systems", by M. R. Miller et al, Telecom '83 (4th World Telecommunication Forum), pp. 2.8.8.1.-2.8.8.5.

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