Switching state retention circuit having a feedback loop stabili

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307246, 307308, 307591, 307310, 307451, 307601, H03K 3286, H03K 3037

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active

050755706

ABSTRACT:
An improvement in a switching state retention circuit of adding a shunt capacitance across an inverter output in a selectable feedback loop. The circuit has a controlled inverter connected to both the selectively connected feedback loop and an output inverter. The shunt capacitance is across an inverter in the feedback loop to control propagation delay therearound without slowing state changes at the output of the circuit.

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"CMOS Logic Performance Characteristics and Circuit Applications", User's Guidebook to Digital CMOS Integrated Circuits, E. R. Hnatek, pp. 34-38 (1981).

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