Switching state retention circuit

Details Switching state retention circuit Switching state retention circuit

1988-10-04

1990-06-26

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072722, H03K 3356

Patent

active

049374737

ABSTRACT:
A data storage latch which permits forming a feedback loop for storage and permits storing data signals in an open loop configuration using logic circuit elements based on cross-coupled transistor loads.

REFERENCES:
patent: 3980897 (1976-09-01), Arnold
patent: 4367420 (1983-01-01), Foss et al.
patent: 4507574 (1985-03-01), Seki et al.
patent: 4558237 (1985-10-01), Rabe et al.
patent: 4569032 (1986-02-01), Lee
patent: 4569067 (1986-02-01), Gallup
patent: 4570094 (1986-02-01), Griffin et al.
patent: 4777388 (1988-10-01), Widener
patent: 4833347 (1989-05-01), Rabe
patent: 4843254 (1989-06-01), Motegi et al.
"Cascode Voltage Switch Logic: A Differential CMOS Logic Family", L. Heller, W. Griffin, 1984 IEEE International Solid-State Circuits Conference, pp. 16-17.
"Differential Split-Level CMOS Logic for Subnanosecond Speeds", L. Pfennigs, W. Mol, J. Bastiaens, J. van Dijk, IEEE Journal of Solid-State Circuits, vol. SC-20, No. 5, 10/85, pp. 1050-1055.

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