Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter
Reexamination Certificate
1999-01-19
2001-02-06
Sterrett, Jeffrey (Department: 2838)
Electric power conversion systems
Current conversion
Including d.c.-a.c.-d.c. converter
C363S097000
Reexamination Certificate
active
06185112
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a switching power supply device, and more particularly, to a switching power supply device employing an RCC (ringing choke converter) system.
2. Description of the Related Art
In general, for equipment and apparatus such as VTR, facsimile equipment, and so forth, a stable direct current voltage is required. In order to supply a stable direct current voltage from a commercial alternating current power supply, is widely used a switching power supply device employing an RCC system of which the configuration is relatively simple and the efficiency is high.
In
FIG. 4
, there is shown a conventional RCC system switching power supply device. In
FIG. 4
, the switching power supply device
1
is formed of an input circuit
2
, a DC—DC converter circuit
3
, a voltage detecting circuit
4
, and a control circuit
5
.
The input circuit
2
is made up of a rectifying diode bridge DB coupled to an AC power supply. A fuse F is provided between the AC power supply and the diode bridge DB. A line filter LF and a smoothing capacitor C
1
are connected across the output terminals of the diode bridge DB.
The DC—DC converter circuit
3
is made up of a transformer T having a primary winding N
1
, a secondary winding N
2
opposite in polarity to the primary winding N
1
, and a feedback winding Nb having the same polarity as the primary winding N
1
, FET Q
1
as a switching element, connected in series with the other end of the primary winding N
1
, a starting-up resistor R
1
connected between one end of the primary winding N
1
and the gate of FET Q
1
as a controlling terminal, a rectifying diode D
1
connected in series with the other end of the secondary winding N
2
, and a smoothing capacitor C
2
connected between the cathode of the diode D
1
and one end of the secondary winding N
2
.
A voltage detecting circuit
4
provided on the output side of the DC—DC converter circuit
3
is made up of a resistor R
2
, a light emitting diode PD
1
on the light emitting side of a photocoupler PC
1
, a shunt regulator Sr and resistors R
3
, R
4
. The resistor R
2
, the shunt regulator Sr, and the resistors R
3
, R
4
are connected in series with one another, and provided in parallel to the capacitor C
2
of the DC—DC converter circuit
3
. The resistors R
3
, R
4
are connected in series with each other, and provided in parallel to the capacitor C
2
. A connection of the resistors R
3
, R
4
is connected to the shunt regulator Sr.
The control circuit
5
is made up of a resistor R
5
and a capacitor C
3
connected in series with each other, provided between one end of the feedback winding Nb and the gate of FET Q
1
, a transistor Q
2
as a controlling element, connected between the gate of FET Q
1
and the other end of the feedback winding Nb, a diode D
2
with its anode connected to the one end of the feedback winding Nb, a resistor R
6
connected between the cathode of the diode D
2
and the base of the transistor Q
2
as the controlling terminal, a capacitor C
4
connected between the base of the transistor Q
2
and the other end of the feedback winding Nb, a resistor R
7
connected in parallel to the capacitor C
4
, a resistor R
8
and a phototransistor PT
1
on the light reception side of the photocoupler PC
1
connected in series with each other, provided between the cathode of diode D
2
and the base of the transistor Q
2
, a diode D
3
with its cathode connected to one end of the feedback winding Nb, a resistor R
9
and a capacitor C
5
connected in series with each other, provided between the anode of the diode D
3
and the other end of the feedback winding Nb, and a resistor R
10
connected between a connection of the resistor R
9
with the capacitor C
5
and the base of the transistor Q
2
.
The operation of the switching power supply device
1
shown in
FIG. 4
will be now described with reference to the graph of
FIG. 5
showing the change of voltage and current in the relevant respective portions of the switching power supply device
1
. In
FIG. 5
, Vgs, V
1
, I
1
, Vds, Vbe
2
, Vb, V
2
, and I
2
represent the gate-source voltage of FET Q
1
, a voltage applied to the primary winding N
1
, a current flowing in the primary winding N
1
, the drain-source voltage of FET Q
1
, the base-emitter voltage of the transistor Q
2
, a voltage produced in the feedback winding Nb, a voltage produced in the secondary winding N
2
, and a current flowing in the secondary winding N
2
, respectively. ON, OFF written in the upper portion of the graph represent the timing when FET Q
1
is turned from OFF to ON (hereinafter, referred to as “turn-on”) and from ON to OFF (hereinafter, referred to as “turn-off”), respectively.
First, the instant that the power supply is turned on for starting up, FET Q
1
is off, so that no current flows in the primary winding N
1
. However, a current flows into the internal capacitor formed between the gate-source of FET Q
1
, through the starting-up resistor R
1
. Thereby, the gate-source voltage of FET Q
1
is raised. At the time when the voltage Vgs exceeds the threshold of FET Q
1
, FET Q
1
begins to be turned on, and then, the drain-source voltage Vds of FET Q
1
becomes nearly zero. As a result, a voltage from the power supply is applied to the primary winding N
1
of the transformer T, causing the current Ti to begin to flow. Thereby, voltages Vb, V
2
are produced in the feedback winding Nb and the secondary winding N
2
, respectively. The voltage Vb produced in the feedback winding Nb makes a current flow into the gate of FET Q
1
from the feedback winding Nb through the resistor R
5
and the capacitor C
3
. This accelerates the rising-up of the gate-source voltage Vgs of FET Q
1
, so that FET Q
1
is completely turned on. In this case, no current flows in the secondary winding N
2
, since voltage V
2
produced in the secondary winding N
2
is in the backward direction with respect to the rectifying diode D
1
.
When FET Q
1
is turned on and a voltage Vb positive in polarity is produced, the capacitor C
4
is charged through the diode D
2
, the resistor R
6
, and the resistor R
8
and the phototransistor PT
1
as described below, so that the voltage across the opposite ends of the capacitor C
4
, namely, the base-emitter voltage Vbe
2
of the transistor Q
2
is raised. In this case, the charging speed (time constant) is determined by the values of the resistors R
6
, R
7
, and R
8
, and the capacitor C
4
, and the phototransistor PT. When the base-emitter voltage Vbe
2
of the transistor Q
2
is raised to exceed a threshold Vth of the transistor Q
2
, the transistor Q
2
is turned on. When the transistor Q
2
is turned on, the collector-emitter voltage of the transistor Q
2
, namely, the gate-source voltage Vgs of FET Q
1
becomes nearly zero, acting to turn off FET Q
1
.
When FET Q
1
begins to turn off, the voltage V
1
applied to the primary winding N
1
becomes zero, and also the current I
1
flowing in the primary winding N
1
becomes zero. However, voltages in the primary winding N
1
, the secondary winding N
2
, and the feedback winding Nb, reverse in polarity to those applied until then, are produced, due to magnetic energy stored in the transformer T, caused by the current I
1
which has flown in the primary winding N
1
in the on-state of FET Q
1
. A voltage is produced in the primary winding N
1
, which is n (ratio of turns of the primary winding to the secondary winding) times higher than the voltage V
2
produced in the secondary winding N
2
, having the reverse polarity. The current I
2
, caused by the voltage V
2
produced in the secondary winding N
2
, having a reverse polarity, flows through the diode D
1
, and is smoothed in the capacitor C
2
to be outputted. The voltage Vb generated in the feedback winding Nb, having the reverse polarity, rapidly absorbs the electric charge from the internal capacitor formed between the gate and the source of FET Q
1
, through the capacitor C
3
and the resistor R
5
, completely turning off FET Q
1
. At the same time, the feed
Nakahira Koji
Nishida Akio
Tani Ryota
Murata Manufacturing Co. Ltd.
Ostrolenk Faber Gerb & Soffen, LLP
Sterrett Jeffrey
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