Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2001-10-02
2003-05-27
Berhane, Adolf Deneke (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S351000
Reexamination Certificate
active
06570368
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a switching power supply device.
2. Description of the Prior Art
An example of a conventional switching power supply device is shown in FIG.
11
. The switching power supply device includes a converter portion
100
and a controller portion
200
. The switching power supply device converts a direct-current voltage fed in via an input terminal IN into a desired direct-current voltage, and then supplies the thus obtained direct-current voltage to a load resistor RL.
First, the configuration of the converter portion
100
will be described. The converter portion
100
includes a capacitor
1
, an NPN-type transistor
2
, a diode
3
, a coil
4
, and an output capacitor
5
, which together constitute a step-down type DC—DC converter. The collector of the transistor
2
is connected to the input terminal IN and to one end of the capacitor
1
. The emitter of the transistor
2
is connected to the cathode of the diode
3
and to one end of the coil
4
.
The end of the coil
4
which is not connected to the transistor
2
is connected to the output capacitor
5
, is connected also via an output terminal OUT to the load resistor RL, and is connected also via the output terminal OUT to the resistor R
1
(described later) provided in the controller portion
200
. The end of the capacitor
1
which is not connected to the transistor
2
, the anode of the diode
3
, the end of the output capacitor
5
which is not connected to the coil
4
, and the end of the load resistor RL which is not connected to the output terminal OUT are each grounded.
Next, the configuration of the controller portion
200
will be described. The controller portion
200
includes an output voltage detection circuit
6
, an error amplifier
7
, a reference voltage source
8
, an operational amplifier
9
, an oscillator
10
, and a driver circuit
11
. The output voltage detection circuit
6
is composed of a resistor R
1
and a resistor R
2
that is connected in series with the resistor R
1
. One end of the resistor R
1
is connected to the output terminal OUT, and the end of the resistor R
2
which is not connected to the resistor R
1
is grounded. The node between the resistors R
1
and R
2
is connected to the inverting input terminal of the error amplifier
7
. The non-inverting input terminal of the error amplifier
7
is connected to the reference voltage source
8
.
The output terminal of the error amplifier
7
is connected to the non-inverting input terminal of the operational amplifier
9
. The inverting input terminal of the operational amplifier
9
is connected to the oscillator
10
. The output terminal of the operational amplifier
9
is connected through the driver circuit
11
to the base of the transistor
2
.
Next, the operation of the switching power supply device configured as described above will be described. The direct-current voltage fed in via the input terminal IN is first smoothed by the capacitor
1
so as to be formed into an input voltage V
IN
, and is then converted into a pulse voltage by the switching operation of the transistor
2
.
When the transistor
2
is in an on state, a current flows from the input terminal IN to the coil
4
. As a result, energy is not only accumulated in the coil
4
, but also supplied to the load resistor RL. On the other hand, when the transistor
2
is in an off state, the energy accumulated in the coil
4
is supplied through the diode
3
to the load resistor RL. Here, to the output terminal OUT is supplied an output voltage V
O
smoothed by the output capacitor
5
, and this output voltage V
O
is applied to the load resistor RL.
The output voltage V
O
of the switching power supply device is fed via the output terminal OUT to the controller portion
200
so as to be subjected to feedback control performed by the controller portion
200
. Specifically, according to the output voltage V
O
of the switching power supply device, the duty factor, i.e. the ratio of the on periods to the sum of the on and off periods, of the pulse voltage output from the transistor
2
is determined. The output voltage V
O
of the switching power supply device is first divided by the output voltage detection circuit
6
. The thus divided voltage V
adj
is then compared with a reference voltage V
ref
(=1.25 V) output from the reference voltage source
8
by the error amplifier
7
.
The error amplifier
7
amplifies the difference between the divided voltage V
adj
and the reference voltage V
ref
, and outputs an output voltage signal V
A
to the operational amplifier
9
. The operational amplifier
9
, in synchronism with the output voltage V
OSC
(a triangular wave) of the oscillator
10
, outputs a PWM signal V
PWM
corresponding to the output voltage signal V
A
. Specifically, when the output voltage signal V
A
from the error amplifier
7
is higher than the output voltage V
OSC
from the oscillator
10
, the operational amplifier
9
outputs a high level as the PWM signal V
PWM
, and otherwise, i.e. when the output voltage signal V
A
from the error amplifier
7
is not higher than the output voltage V
OSC
from the oscillator
10
, the operational amplifier
9
outputs a low level as the PWM signal V
PWM
. Here, the frequency of the output voltage V
OSC
(a triangular wave) oscillated by the oscillator
10
is set to be 100 kHz to prevent audible noise. Moreover, the maximum and minimum levels of the output voltage V
OSC
(a triangular wave) oscillated by the oscillator
10
are set to be 1.75 V and 0.75 V, respectively.
The PWM signal V
PWM
is fed to the driver circuit
11
, and the driver circuit
11
, according to the PWM signal V
PWM
, supplies a current to the base of the transistor
2
and thereby controls the switching operation of the transistor
2
. Specifically, when the driver circuit
11
receives a high level as the PWM signal V
PWM
from the operational amplifier
9
, it feeds a current I
B
to the base of the transistor
2
to bring the transistor
2
into an on state. On the other hand, when the driver circuit
11
receives a low level as the PWM signal V
PWM
, it turns the current I
B
supplied to the base of the transistor
2
to zero and thereby brings the transistor
2
into an off state. In this way, the ratio of the on periods t
ON
to the off periods t
OFF
of the transistor
2
is controlled in such a way that the output voltage V
O
of the switching power supply device which is supplied to the load resistor RL is stabilized at a predetermined level (5 V). The duty factor “duty” of the PWM signal V
PWM
and of the transistor
2
is given by formula (1) below.
duty
=
t
ON
t
ON
+
t
OFF
×
100
=
V
O
V
IN
×
100
(
1
)
In the on periods t
ON
, in which the transistor
2
is in an on state, the gradient of the current I
L
that flows through the coil
4
is positive, and, in the off periods t
OFF
, in which the transistor
2
is in an off state, the gradient of the current I
L
that flows through the coil
4
is negative.
To cope with this, as described earlier, a voltage smoothed by the output capacitor
5
is supplied as the output voltage V
O
to the load resistor RL. However, equivalent series resistance (hereinafter referred to as ESR) exists in the output capacitor
5
, and therefore the output voltage Vo contains a ripple voltage V
rms
, i.e. an alternating-current component.
FIG. 12
shows a time chart of the output voltage signal V
A
from the error amplifier
7
, the output voltage V
OSC
from the oscillator
10
, and the PWM signal V
PWM
as observed at room temperature (25° C.). The frequency of the PWM signal V
PWM
is equal to that of the output voltage V
OSC
from the oscillator
10
, and therefore the switching frequency f
0
of the transistor
2
is equal to the frequency of the output voltage V
OSC
from the oscillator
10
, i.e. 100 kHz.
However, as the temperature falls, the ESR of the output capacitor
5
increases, and thus, as shown in
FIG. 13
, the ripple voltage V
rms
contained in the output voltage V
O
increases.
H
Berhane Adolf Deneke
Birch Stewart Kolasch & Birch, LLP.
Sharp Kabushiki Kaisha
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