Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2003-02-24
2004-09-14
Nguyen, Matthew V. (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
Reexamination Certificate
active
06791305
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a switching power supply control circuit and a switching power supply using same, and particularly to a control circuit that performs digital control of a switching power supply and a switching power supply using same.
DESCRIPTION OF THE PRIOR ART
Switching power supplies are conventionally used in computers, home electronics, automobiles and various other products. Typical switching power supplies are units (DC/DC converters) that first use switching circuits to convert a DC input to AC and then convert it back to DC, and thus it is possible to obtain DC output of a different voltage than the input voltage.
With such a switching power supply, a control circuit is used to detect the output voltage and the switching operation is controlled by the switching circuit based thereupon. Thereby, the switching power supply supplies a stable operating voltage to the load to be driven.
However, the clock speed of the central processing unit (CPU) or digital signal processor (DSP) used in recent years has greatly increased, and thus the power consumption of the CPU or DSP has become much larger than in the past. Against this background, reducing CPU and DSP power consumption has recently become a serious problem, and as one method of doing this, technologies that vary the operating voltage required depending on the operating state have been proposed. Accordingly, switching power supplies for supplying power to these types of CPU or DSP must be able to switch their output voltage quickly.
On the other hand, in order to achieve this low power consumption, CPU and DSP operating voltages are becoming lower and lower every year, and accordingly the output voltage margin tolerated in the switching power supply has become extremely small.
Against this background, switching power supplies that are able to switch the output voltage with high precision and at high speed have become desirable in recent years.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a switching power supply control circuit that can switch the output voltage with high precision and at high speed.
Another object of the present invention is to provide a switching power supply that can switch the output voltage with high precision and at high speed.
An object of the present invention is thus achieved by a control circuit for performing digital control of a switching power supply equipped with a switching circuit block, comprising: a first means that generates an output voltage digital value that indicates the actual output voltage of the switching power supply in response to a first clock signal, a second means that generates a reference voltage digital value that indicates a target value of the output voltage of the switching power supply in response to a second clock signal, a third means that compares the output voltage digital value and the reference voltage digital value and generates an error voltage digital value based thereupon, and a fourth means that reads the error voltage digital value in response to a third clock signal and controls the operation of the switching circuit block based thereupon, wherein: the phases of the first clock signal and the third clock signal are substantially shifted and the phases of the second clock signal and the third clock signal are substantially shifted.
In a preferred embodiment of the present invention, the phase difference between the first clock signal and the third clock signal is greater than the sum of the operating time delay of the first means and the operating time delay of the third means.
In a further preferred embodiment of the present invention, the phase difference between the second clock signal and the third clock signal is greater than the sum of the operating time delay of the second means and the operating time delay of the third means.
In a further preferred embodiment of the present invention, the frequencies of the first through third clock signals essentially agree.
In a further preferred embodiment of the present invention, the phases of the first clock signal and the second clock signal essentially agree.
In a further preferred embodiment of the present invention, the second means comprises a plurality of memories that contain mutually different digital values, and a multiplexer that selects one of the plurality of memories in response to the second clock signal and outputs the digital value contained in the selected memory as the reference voltage digital value.
In a still further preferred embodiment of the present invention, the second means comprises a register that reads a digital value in response to the second clock signal and outputs this digital value as the reference voltage digital value.
In a further preferred embodiment of the present invention, the first means is an A/D converter and the third means is a logic circuit.
An object of the present invention is also achieved by switching power supply comprising: a switching circuit block that converts a DC input voltage to AC, an output circuit block that receives the AC output from the switching circuit block and converts it to DC, and a control circuit that controls the operation of the switching circuit block so that the output voltage of the output circuit block is a certain value, wherein the switching circuit block comprises: a first means that generates an output voltage digital value that indicates the actual output voltage of the switching power supply in response to a first clock signal, a second means that generates a reference voltage digital value that indicates a target value of an output voltage of the switching power supply in response to a second clock signal, a third means that compares the output voltage digital value and the reference voltage digital value and generates an error voltage digital value based thereupon, and a fourth means that reads the error voltage digital value in response to a third clock signal and controls the operation of the switching circuit block based thereupon, and wherein: the phases of the first clock signal and the third clock signal are substantially shifted and the phases of the second clock signal and the third clock signal are substantially shifted.
In a preferred embodiment of the present invention, the phase difference between the first clock signal and the third clock signal is greater than the sum of the operating time delay of the first means and the operating time delay of the third means, and the phase difference between the second clock signal and the third clock signal is greater than the sum of the operating time delay of the second means and the operating time delay of the third means.
With the present invention having the aforementioned constitution, it is possible to switch the output voltage with high precision and at high speed.
The above and other objects and features of the present invention will become apparent from the following description made with reference to the accompanying drawings.
REFERENCES:
patent: 3970919 (1976-07-01), Butcher
patent: 5883501 (1999-03-01), Arakawa
patent: 6137188 (2000-10-01), Mitchell et al.
patent: 6204651 (2001-03-01), Marcus et al.
patent: 6275019 (2001-08-01), Fisher
patent: 6275364 (2001-08-01), Voit
patent: WO 00/07414 (2000-02-01), None
Imai Takakazu
Uematsu Takeshi
Nguyen Matthew V.
Seed IP Law Group PLLC
TDK Corporation
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