Switching power supply circuit

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

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323268, G05F 140

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active

058617353

ABSTRACT:
Switching power supply circuit of the invention is provided with an nMOS transistor (Q1) and a pMOS transistor (Q2) connected in parallel inversely for switching an input DC voltage, and a driving circuit (3) for switching the nMOS transistor (Q1) when the duty-cycle is small and the pMOS transistor (Q2) when the duty-cycle becomes large. Therefore a stable output voltage can be obtained through the pMOS transistor (Q2) against fall of the input DC voltage supplied from a battery until its available limit determined by on-resistance of the pMOS transistor (Q2), while the stable output voltage can be obtained with minimum driving loss through the nMOS transistor (Q1) having smaller input parasitic capacitance compared to the pMOS transistor (Q2), when the input DC voltage is sufficiently high.

REFERENCES:
patent: 4940929 (1990-07-01), Williams
patent: 4959606 (1990-09-01), Forge
patent: 5532918 (1996-07-01), Mayrand et al.
patent: 5592072 (1997-01-01), Brown
patent: 5726845 (1998-03-01), Ho
patent: 5747976 (1998-05-01), Wong et al.
patent: 5777462 (1998-07-01), Yue

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