Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter
Reexamination Certificate
2001-09-17
2003-03-04
Nguyen, Matthew (Department: 2838)
Electric power conversion systems
Current conversion
Including d.c.-a.c.-d.c. converter
C363S021160
Reexamination Certificate
active
06529390
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a synchronous rectification type switching power supply circuit. With improvement for lower voltage and higher current of LSI, the power supply circuit requires to be formed on a board with higher efficiency. As a method of improving the switching power supply, the secondary side rectifying circuit is generally formed as the synchronous rectifying circuit, but the synchronous rectification sometimes results in the function of an inverse converter that converts the power to the primary side from the secondary side due to the spread and suction of the power supply because parallel operation or various kinds of power supplies are used. The present invention has overcome the problems of the synchronous rectifying circuit with a circuit structure available in common even for various output power supplies of lower voltage.
2. Description of the Related Art
The power supply circuit of the synchronous rectifying system introduces the following systems.
(First System)
FIG. 18
illustrates a first structural example of the related art circuit. In the forward type switching power supply, the positive side in the secondary side of the transformer T is connected with the gate of control FETQ
3
to control the gate of the forward side (rectifying) FETQ
1
, drain of the commutating FETQ
2
and gate of the commutating FETQ
2
. The drain of FETQ
3
is connected with the gate of the commutating FETQ
2
.
The load side of the secondary side of the transformer T is connected with the source of control FETQ
3
and drain of forward side FETQ
1
and the sources of FETQ
1
and FETQ
2
are connected and are then connected to the load terminal of the output. L is a choke coil and C is a smoothing capacitor. D
9
, D
10
connected in the primary side of the transformer T are redundant diodes, allowing impression of a plurality of voltages. Q
0
is the primary side switching FET (main switch) connected to the primary side of the transformer T. The sign &Circlesolid; given to the transformer T indicates the direction (polarity) of the winding.
The secondary coil voltage of the transformer T becomes 0V between the period of t
3
and t
4
indicated in the time chart illustrated in
FIG. 19 and a
gate voltage of the commutating FETQ
2
is lowered to result in a large loss (dotted line portion). Therefore, an internal diode of FETQ
3
rejects the discharge and holds the gate voltage of FETQ
2
in the period t
2
to t
4
. In the period t
1
to t
2
, the commutating FETQ
2
is turned OFF due to the short-circuit operation of FETQ
3
. In
FIG. 19
, (a) is the secondary side voltage of the transformer T, (b) is the gate-to-source voltage Vgs of the rectifying FETQ
1
and (c) is the gate-to-source voltage of the commutating FETQ
2
.
In this circuit system, when a voltage is impressed to the output side, a bias is applied to the gate of the forward side FETQ
1
. Thereby, ON operation of the FETQ
1
OFF operation of FETQ
1
in the forward side occur alternately and thereby an ordinary self-oscillating circuit that repeats the switching operations operates like an inverse converter to start the power conversion to the primary side from the secondary side. The only way for suspending the self-oscillation is to stop the application of an external voltage.
In this circuit, when an output voltage becomes a low voltage power source, the voltage across the transformer T also becomes lower. Accordingly, there is no voltage to drive the FET, and therefore it is required to supply a voltage from the other winding.
(Second System)
FIG. 20
illustrates a second structural example of the related art circuit. The elements like those of
FIG. 18
are designated with the like reference numerals. The structural example of this figure is a forward type switching power supply in which the secondary coil n
2
and the tertiary coil n
3
are provided in the transformer T. The gates of the synchronous rectifying FETQ
1
, Q
2
and the cathodes of the diodes D
1
and D
2
are connected across the tertiary coil n
3
.
On the other hand, the sources of FETQ
1
, Q
2
and anodes of the diodes D
1
, D
2
are connected and also connected to the output terminal on the negative side. The drain of FETQ
2
is connected to the positive side of the secondary coil n
2
and this terminal is then connected to the output terminal in the positive side passing LC of the smoothing circuit. One side of the secondary coil n
2
is connected with the drain of FETQ
1
.
With the switching operation, the FET gate voltage in the positive side of the tertiary coil n
3
charges an internal FET gate capacity to turn ON FETQ
1
, thereby a forward current flows into the diode D
2
connected to the negative side of the coil, forming a current route of the positive side. Moreover, the forward voltage of the diode D
2
resets the gate-to-source voltage of FETQ
2
and stops operation thereof. With the switching of the primary side, the terminal voltage of the transformer T changes alternately to alternately realize the operations explained above.
In this circuit system, the current transmitting side FETQ
2
cannot be controlled within the period t
2
to t
3
with the voltage waveform of the secondary coil. Therefore, a flat transformer voltage waveform is necessary during the period t
2
to t
1
and an external circuit is further required resulting in a large loss.
However, this circuit is of the system for resetting the gate-to-source voltage of FET with a diode. However, since the gate voltage cannot be reset perfectly with the operation of diode, there rises a problem that both FETQ
1
, Q
2
for synchronous rectification turn ON simultaneously and repeat unstable operations.
FIG. 21
is a time chart indicating operation waveforms of each portion of the second related art circuit. FIG.
21
(A) indicates the ideal operation, while FIG.
21
(B), actual operation, respectively. In the respective time charts, (a) indicates the secondary voltage of transformer T; (b), the gate-to-source voltage Vgs of FETQ
1
; (c), Vgs of FETQ
2
, respectively. In the case of ideal operation illustrated in
FIG. 21
(A) Q
1
and Q
2
alternately repeat ON/OFF to perform correct synchronous rectification. Meanwhile, in the case of the actual operation illustrated in FIG.
21
(B), Vgs of Q
1
, Q
2
is so-called floated and thereby, the gate potential is not fixed and accurate ON/OFF operations of Q
1
and Q
2
cannot be realized.
(Third System)
FIG. 22
illustrates a third structural example of the related art circuit. In this example, the secondary coil n
2
and the tertiary coil n
3
of the transformer are connected in series in a flyback type power supply and FETQ
1
is driven with the tertiary coil. In the flyback system, Q
1
is turned ON with the tertiary coil voltage at the switching OFF time to output the excitation energy, of the secondary coil. In the switching ON time, the gate of FETQ
1
is pulled to turn OFF with the electrode inversion of the tertiary coil n
3
. In this circuit, FETQ
1
operates when an external voltage is applied from the output terminal for the self-oscillating operation.
The synchronous rectifying system uses FETs for rectification and since higher efficiency and reduction in size can be improved over the diode rectifying system of the related art, the synchronous rectifying circuit using FET in the power supply is mainly used. When a voltage is applied to the gate, FET allows a current to flow in the rectifying direction but since a current also flows in the inverse direction, the power supply may fail because of the following problems.
FIG. 23
is an explanatory diagram of inverse condition operation with an external voltage and the elements like those in
FIG. 18
are designated with the like reference numerals. In this circuit system, an external voltage V
1
is applied from the output terminal. In the circuit system of the related art, a gate voltage of FET is connected to the output terminal and when the synchronous rectifying FETQ
1
, Q
2
are driven with the application v
Katten Muchin Zavis & Rosenman
Nguyen Matthew
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