Switching power supply

Electric power conversion systems – Current conversion – With condition responsive means to control the output...

Reexamination Certificate

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Details

C363S021030, C363S127000

Reexamination Certificate

active

06191965

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a switching power supply of a synchronous rectification type for rectifying a voltage induced in a secondary winding of a switching transformer thereof in synchronism with induction of the voltage.
2. Description of the Related Art
Conventional switching power supplies usually employ the diode rectification method of rectifying and smoothing an alternating current output from a secondary winding of a switching transformer thereof by using a diode and a capacitor arranged on the side of the secondary winding. On the other hand, in recent years, a synchronous rectifier circuit using an FET as a rectifying element has been actively developed with a view to reducing power loss caused by the diode during the rectification. A power supply
71
shown in
FIG. 8
is an example of the related art, i.e. the switching power supply having a synchronous rectifier circuit of the above-mentioned type.
The power supply
71
is basically a flyback switching power supply including a synchronous rectifier circuit disclosed in Japanese Laid-Open Patent Publication (Kokai) No. 9-312972 filed by the present assignee. More specifically, the power supply
71
includes a switching transformer
2
, and a primary circuit (primary winding-side circuit) on the side of a primary winding
2
a
of the transformer
2
, which is comprised of a diode stack
11
for rectifying an alternating current output from an AC power source PS, a smoothing capacitor
12
, a MOS field effect switching transistor (hereinafter referred to as “the FET”)
14
, a resistance
16
of a bias circuit, and a switching control circuit
17
for controlling switching operation of the FET by a frequency control method or a PWM (Pulse Width Modulation) control method. In this primary circuit, a capacitor
15
shown in the figure is implemented by a capacitance between the source and drain of the FET
14
, or a capacitor arranged separately from the capacitance of the capacitor
15
.
A synchronous rectifier circuit
72
is arranged in a secondary circuit (secondary winding side-circuit) on the side of a secondary winding
2
b
of the transformer
2
. The synchronous rectifier circuit
72
is comprised of a current transformer
21
, an FET
22
, resistances
23
,
24
of a bias circuit, a diode
25
, and a smoothing capacitor
26
. The current transformer
21
has a primary winding
21
a
connected in series with an output line for outputting a rectified current to an external load, and a secondary winding
21
b
having the number of turns n times as large as that of turns of the primary winding
21
a
(i.e. turn ratio of the secondary winding
21
b
to the primary winding
21
a
is equal to n) and serving as a current pickup winding. From the secondary winding
21
b,
the current transformer
21
outputs a control current I
12
having a current value which is equal to the current value of a current I
11
flowing through the primary winding
21
a
multiplied by the reciprocal (1
) of the turn ratio n.
The FET
22
includes an inner parasitic diode
27
. When an alternating current induced in the secondary winding
2
b
of the transformer
2
flows in the same direction as that of a voltage V
S11
indicated in FIG
8
, the FET
22
permits positive part of the alternating current to pass therethrough via the inner parasitic diode
27
, whereas when the alternating current induced in the secondary winding
2
b
is directed in the same direction as that of a voltage V
S12
indicated in
FIG. 8
, the FET
22
prevents the alternating current from passing therethrough.
In the power supply
71
, when an alternating current is output from the AC power source PS, the alternating current is rectified to a pulsating current by the diode stack
11
, and the pulsating current is smoothed to a DC current by the capacitor
12
. Then, the DC current is switched by the FET
14
under the control of the switching control circuit
17
, whereby a current I
D
(see a left side portion of
FIG. 9A
) flows into the primary winding
2
a
of the transformer
2
to accumulate energy in the transformer
2
. Next, when the FET
14
is switched off, the current I
11
(see a left side portion of
FIG. 9B
) is caused to be output from the secondary winding
2
b
by the energy accumulated in the transformer
2
. In this case, the current I
11
flows through a closed loop of the secondary winding
2
b
of the transformer
2
, the primary winding
21
a
of the current transformer
21
, the capacitor
26
, and the inner parasitic diode
27
, whereby the current I
11
is smoothed by the capacitor
26
. In this state, when the current I
11
passes through the primary winding
21
a,
the control current I
12
is output from the secondary winding
21
b
to flow into the gate of the FET
22
via the resistance
24
to charge the gate capacitance. After the gate capacitance of the FET
22
is charged, the control current I
12
flows through a closed loop of the secondary winding
21
b
and the resistances
24
,
23
, whereby a voltage V
G
(see a left side portion of
FIG. 9C
) generated across opposite ends of the resistance
23
is applied to the gate of the FET
22
.
When the voltage V
G
applied to the gate of the FET
22
becomes higher than an ON voltage V
ON
of the FET
22
, the FET
22
is turned on, as shown in a left side portion of FIG.
9
D, to permit the current I
11
to pass between the source and drain of the FET
22
. As a result, the alternating current induced in the secondary winding
2
b
is rectified mainly by using the FET
22
. In this case, the rectification causes power loss amounting to a value obtained by multiplying the square of the rectified current by the ON resistance of the FET
22
, which is far smaller than power loss which would be suffered by the power supply
71
when it employs the diode rectification method.
Next, when the current I
11
stops flowing, the control current I
12
also stops flowing, and accordingly, the voltage V
G
applied to the gate of the FET
22
is lowered. In this process, the electric charge accumulated in the gate of the FET
22
is released to the low potential line via the diode
25
and the secondary winding
21
b
of the current transformer
21
, and hence the gate voltage V
G
is instantly decreased to 0V, thereby causing the FET
22
to stop its operation in an extremely short turn-off time. As a result, when the current I
D
flows through the primary winding
2
a
next time, the FET
22
is maintained in a completely inoperative state, and in this state, the direction of a current about to flow in the secondary winding
2
b
and the forward direction of the inner parasitic diode
27
are opposite to each other, so that the current is inhibited from flowing through the secondary winding
2
b,
thereby reliably preventing the generation of a countercurrent which charges the capacitor
26
in the opposite direction.
As described above, according to the power supply
71
, the current transformer
21
generates and outputs the control current I
12
having a current value approximately proportional to a current value of the current I
11
rectified by the inner parasitic diode
27
, to thereby make the FET
22
operative. This enables an increased rectifying efficiency to be achieved in comparison with the diode rectification method.
However, the switching power supply
71
has room for improvement as to the following points: It is true that no particular inconveniences occur when the switching control circuit
17
controls the switching operation of the FET
14
by the frequency control method, but when the switching operation of the FET
14
is controlled by the PWM control method, as shown in a right side portion of
FIG. 9A
, the transformer
2
sometimes completes release of the accumulated energy before the FET
14
is turned on next time. In such a case, there occurs a so-called discontinuous current mode in which the current I
11
flowing through the secondary winding
2
b
and a current flowing through the primary winding
2
a

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