Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1999-08-16
2003-06-10
Kizou, Hassan (Department: 2662)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S395310
Reexamination Certificate
active
06577629
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a switching network which operates in accordance with the asynchronous transfer mode and which comprises a switching unit which is provided in the header field of a cell to change the selected contents in the header field.
Such a switching network is known, for example, from “Killat et. al.: A versatile ATM switch concept, XIII International Switching Symposium, Stockholm, Sweden, May 27-Jun. 1, 1990, Session A6, Paper #4, Proceedings, Vol. IV, pp. 127-134”. Cells arriving at an input of the switching network are fed to a translation circuit, which interprets information in the header field of a cell and at least partly replaces this information with new values. After said translation, a cell is supplied to the input of a switching block, which leads the cell to at least a specific output of the switching block. In many applications, often not the entire contents of a header field of a cell is guided from the input to the output of the switching network. Specific bits in the header field are used, for example, for internal information.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a switching network which, in spite of the change in specific information in the header field of a cell, makes the entire information of the header field of the cell available at the output of the switching network.
The object in accordance with the invention is achieved by a switching device of the type mentioned in the opening paragraph, in that a pre-processing circuit is coupled to each input of the switching unit, and a post-processing circuit is coupled to each output of the switching unit, upon the arrival of a cell, which is assigned to a specific virtual connection, each pre-processing circuit is provided to store the selected contents of the header field of the cell in an associated table if no entry is stored in connection with this virtual connection or if the stored entry deviates from the selected contents of the header field, a table is assigned to each post-processing circuit, which table is provided to store the selected contents supplied by a pre-processing circuit which is associated with a virtual connection, and after the reception of a cell associated with a specific virtual connection, a post-processing circuit is provided to replace a selected contents of the header field of this cell by entering this virtual connection into the associated table.
In accordance with the invention, a pre-processing circuit is provided which is used to check whether an associated table already contains an entry with a selected contents of the header field of this cell. The selected contents should at least comprise the bits of the header field which are changed in the subsequent header field. If the table does not contain an entry or if an entry associated with this virtual connection of the cell is not identical to the selected contents of the header field, then this contents is stored in the table. After a cell associated with a specific virtual connection is received in the post-processing circuit, the contents stored in the table replaces the corresponding contents in the header field of the received cell. A table associated with a pre- or post-processing circuit may either be a constituent of said pre- or post-processing circuit or an independent switching element. By the addition of the pre- and post-processing circuit and the substitution of specific bits in the header field, the switching block provides, in spite of a change of specific bits in the header field, a cell comprising the information of the post-processing circuit which was available prior to the entry into the switching unit. In this respect, it is to be noted, however, that a change of specific VCI and VPI values characterizing the virtual connection and resulting from a translation in the switching unit should not be interpreted as a change in the contents of the header field.
In claim 2 a description is given of a further function of the pre-processing circuit. This pre-processing circuit does not only store the selected contents of a header field but also causes said contents to be supplied to at least one post-processing circuit by means of a cell. The evaluation of this cell received from a post-processing circuit is explained in claim 3. Claim 4 describes an alternative to the supply of the selected contents of a header field to at least one table of a post-processing circuit.
An embodiment of the switching unit in which the number of inputs and outputs of the switching unit can be increased in a simple manner is indicated in claim 5.
REFERENCES:
Killat et al., “A Versatile ATM Switch Concept”, XIII International Switching Symposium, Stockholm, Sweden, May 27-Jun. 1, 1990, Session A6, Paper #4, Proceedings, vol. IV, pp. 127-134.
Kizou Hassan
Koninklijke Philips Electronics , N.V.
Odland David
Piotrowski Daniel J.
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