Switching matrix crosspoint

Communications: electrical – Continuously variable indicating – With meter reading

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34082589, 34082592, 379292, 379269, H04Q 118, H04M 300, G06G 712

Patent

active

RE0354830

ABSTRACT:
A crosspoint for a switching matrix constituted by enhanced P-channel and N-channel MOS transistors. Each input line conductor (Ii1 and Ii2) is connected to an input of a first differential amplifier (M3, M4), each leg of which is associated by a current mirror circuit to a first current source (M9, M10, M11) enabled by a selection input (Sij) of the crosspoint. The outputs of the first differential amplifier are connected to a second differential amplifier (M1, M2) fed by a second current source (I) common to all the crosspoints of a same column. The outputs of the second differential amplifier are connected to the pair of conductors (Oj1, Oj2) of an output column, an extremity of this column being connected to the high voltage source (Vdd) through a resistor (R).

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"A 250-MBIT/s CMOS Crosspoint Switch", (Shin and Hodges) pp. 479-486 vol. 24 No. 2, Apr. 1989.
Hayward et al. "CMOS VLSI Applications in Broadband Circuit Switching", IEEE Journal on Selected Areas in Communications, vol. SAC-5, No. 8 (Oct. 1987) pp. 1231-1241.
Scott et al. "A CMOS Slope Adaptive Delta Modulator", 1986 IEEE International Solid State Circuits Conference. Digest of Technical Papers (Feb. 1986) pp. 130-131.

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