Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Integrated structure
Reexamination Certificate
2002-11-19
2004-10-05
Nuton, My-Trang (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
Integrated structure
C324S765010
Reexamination Certificate
active
06801081
ABSTRACT:
The invention relates to integrated circuits dedicated to high rate transmissions, provided with integrated RF test means. In particular, it relates to a switching device comprising a plurality of inputs and outputs connected by means of connection points constituting a switching matrix which is driven by a control member for switching signals supplied at said inputs to said outputs, the device comprising integrated test means controlled by said control member so as to test the operation of said connection points.
The invention also relates to an integrated circuit comprising such a device. Finally, it relates to an autoswitch of a transmission system using optical connections and comprising such a device.
The invention finds numerous applications, notably in optical transmission systems. It is particularly advantageous in applications for high rate packet switching.
The integrated circuits operating at a high rate, which may range up to several gigabits per second, necessitate appropriate test tools. Indeed, it is difficult, at the level of the test during production, to externally inject signals having such high frequencies into the circuits.
European application published under no. EP 229 433 describes a test circuit for a combinatory logic circuit and an integrated circuit comprising such a device. The device is provided with integrated test means with which the circuit under production can be tested, i.e. testing the operation of each connection point of a switching matrix. These means comprise a test signal generator for generating predetermined test signals and a detector for detecting whether the test signals supplied at the inputs of the switching device are correctly received at the outputs.
The use of a single couple of a generator and a detector as described in the above-mentioned application has certain drawbacks. The paths traversed by the test signals from the test signal generator to the selected input of the circuit to be tested, on the one hand, and from the corresponding output to the signal detector, on the other hand, are relatively long for RF transmissions. In the majority of cases, the path traversed is of the order of three times on both sides of the circuit, i.e. upstream and downstream of the circuit. This path length is considerable for RF transmissions and may have detrimental losses at the origin for the performance of the circuit. Another drawback is that this test configuration implies that the paths in the reverse direction, i.e. upstream and downstream of the circuit must be traced parallel along each other until they sometimes cross each other as a function of the trace constraints. The parallel transmission lines and those in the reverse direction, as well as the line crossings, also have the tendency of introducing perturbations in the RF transmissions. These perturbations are detrimental for the performance of the circuit. During operation in the test mode, the measures taken may be altered considerably because of these perturbations, which reduces the reliability of the realized test.
It is an object of the invention to provide a switching device provided with integrated test means which does not have the drawbacks of the known device.
To this end, a device of the type described in the opening paragraph is provided, which is characterized in that the integrated test means comprise:
a first generator for generating a first predetermined test sequence on a first part of said inputs,
a second generator for generating a second predetermined test sequence on a second part of said inputs, the generators being fed by one and the same clock signal,
a first detector for detecting whether said first or second test sequences are correctly received at a first part of said outputs, and
a second detector for detecting whether said first or second test sequences are correctly received at a second part of said outputs.
This configuration of the test means separates the inputs and the outputs in two parts. Each generator delivers a part of the inputs and each detector receives a part of the outputs. These test means provide the possibility of limiting the distances traversed by the RF signals in the test paths on both sides of the switching matrix and of avoiding that the paths cross each other or get longer.
These and other aspects of the invention are apparent from and will be elucidated, by way of non-limitative example, with reference to the embodiment(s) described hereinafter.
REFERENCES:
patent: 5471468 (1995-11-01), Sandin et al.
patent: 6272337 (2001-08-01), Mount et al.
patent: 0229433 (1990-08-01), None
Burg Olivier
Fahs Bassem
Gloaguen Gilbert
Aaron Waxler
Koninklijke Philips Electronics , N.V.
Nuton My-Trang
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