Switching current mode converter with reduced turn-on delay of p

Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter

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363 98, 363132, H02M 3335, H02M 324, H02M 75387

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active

059562390

ABSTRACT:
The turn-on delay of a current mode switching converter is reduced by an error summing block including a window comparator to the input of which is fed the output voltage of the converter before being filtered by the low pass filter and to which a low threshold and high threshold reference voltages are applied, both of which are referred to the reference voltage of the converter. The error summing block also includes a differentiating circuit whose input is coupled to the so defined "under" output of the window comparator and outputting a pulse of a preestablished duration at the incoming of a rising front of the input signal. Two amplifiers of the same gain K, are also provided, and both are enableable for outputting an amplified signal only when enabled. In addition, two summing circuits are also included. One summing circuit adds the reference signal of the converter (Vref), and the other the feedback signal of the output voltage filtered by the low pass filter to the respective signals amplified by the enabling amplifiers when enabled.

REFERENCES:
patent: 4975820 (1990-12-01), Szepesi
patent: 5047914 (1991-09-01), Dhyanchand et al.
patent: 5189601 (1993-02-01), Sellers
patent: 5406468 (1995-04-01), Booth
Frank Goodenough, "Fast LDOs and Switchers Provide Sub-5-V Power," Electronic Design, vol. 43, No. 18, Sep. 5, 1995, pp. 65, 66, 68, 70, 72 and 74.
Patent Abstracts of Japan, vol. 015, No. 371, (E-1113) , Sep. 18, 1991, and JP 03 145968A, Mitsubishi Electric Corp., Jun. 21, 1991.

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