Electrical transmission or interconnection systems – Switching systems – Condition responsive
Reexamination Certificate
1999-11-26
2002-04-30
Ballato, Josie (Department: 2836)
Electrical transmission or interconnection systems
Switching systems
Condition responsive
C330S285000, C327S434000
Reexamination Certificate
active
06380644
ABSTRACT:
FIELD OF INVENTION
The present invention relates to switching circuitry, and in particular, to a transistor switching circuitry providing improved signal performance at high frequencies.
BACKGROUND OF THE INVENTION
Analog or digital switches are employed for connecting two points in signal path to one another. Usually, such switches employ a semiconductor device which is connected between the two points. When the semiconductor device is rendered conductive, it completes a circuit between the two points, and when the device is rendered non-conductive, it opens the circuit between the two points. It is common to use transistors as switches, the most widely used examples including bipolar junction transistor (BJT), field effect transistor (FET), junction FET (JFET), metal-oxide semiconductor FET (MOSFET) and other known types of transistors used in electronic industry.
A typical example of the prior art switch
10
is shown in FIG.
1
. It comprises a switching means represented by an NMOS transistor
12
, whose source
14
is connected to an input node
18
of an input means
20
, the input node being a first circuitry point, and whose drain
16
is connected to an output node
22
of an output means
24
, the output node being a second circuitry point. The input means
20
has an output resistance R
2
, and the output means
24
has an input resistance R
3
, usually R
3
being much larger than R
2
. The gate
26
of the transistor
12
is connected to the control means
28
which sends a control signal to the gate
26
to open or close the transistor
12
. The control means has an internal resistance R
0
which is small compared to the output resistance R
2
and the input resistance R
3
. When the control signal is below a predetermined threshold value, the transistor
12
is cut off and therefore is non-conducting, which means that the input and output nodes
18
and
22
along a signal path are disconnected. Alternatively, when the control signal is above the threshold value, the transistor
12
is conducting, and the two nodes
18
and
22
along the signal path are connected to each other.
There is a drawback associated with the above circuitry. It is known that semiconductor devices have internal distributed resistance and capacitance inherently coupled into the devices due to their internal structure. For example, MOSFET transistors have dominant capacitive effect due to the gate-to-channel capacitance which can be modeled by a single capacitor between the gate and the conducting channel. The corresponding distributed capacitor C
ch
associated with the internal structure of the transistor
12
is designated by numeral
29
in
FIG. 1
(the corresponding distributed resistance R
ch
of the transistor
12
is not shown). The presence of the distributed capacitor C
ch
influences the frequency characteristics of the switching circuitry
10
. The capacitor C
ch
and the resistor R
2
form a resistor-capacitance circuit R
2
C
ch
which results in the following transfer function of the switching circuitry
10
:
T=V
out
/V
in
=1/(1
+j&ohgr;C
ch
R
2
) (1)
where V
in
and V
out
are input and output voltages at the input and output nodes
18
and
22
respectively, &ohgr; is frequency of the transmitted signal, and j={square root over (−1)}. As follows from equation (1), the RC circuit operates as a low pass filter, and the switching circuitry
10
cuts off high frequency signals starting approximately at &ohgr;~1/(R
2
C
ch
). As a result, the circuitry
10
exhibits substantial signal degradation at high frequencies which is not acceptable in many practical situations.
Accordingly, there is a need in electronic industry for designing alternative switching circuitry which would reduce or eliminate the influence of the parasitic capacitance and provide no or substantially reduced signal degradation at high frequencies.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a switching circuitry which would avoid the afore-mentioned problem.
According to one aspect of the invention there is provided a switching circuitry, comprising:
a semiconductor device having an input node and an output node, the input node being connected to an input means having an output resistance R
2
, and the output node being connected to an output means having an input resistance R
3
;
the semiconductor device having a first state where the first node and the second node are substantially electrically connected, and a second state where the nodes are substantially electrically disconnected;
the semiconductor device being responsive to a control signal generated by a control means, having an output resistance R
1
, to provide switching of the device between the first and the second states;
the switching circuitry being characterized in that the output resistance of the control means R
1
is greater than the output resistance of the input means R
2
i.e. R
1
>R
2
, thereby ensuring that switching of an electrical signal is provided so that signal degradation at high frequencies is substantially reduced or eliminated.
Preferably, the control means has the output resistance which is much greater than the output resistance of the input means, i.e. R
1
>>R
2
. It provides voltage gain and phase shift between the output and input voltages approaching unity and zero respectively at high frequencies, thus ensuring no signal degradation. Usually the output resistance of the control means is of the order of magnitude or greater than the input resistance of the output means, i.e. R
1
≧R
3
. Other arrangements when R
1
>>R
3
and/or R
3
>>R
2
are also possible. Conveniently, the resistance R
1
can have a variable magnitude, e.g. being formed as a digitally controlled resistive network to provide digital control of resistance of the resistor R
1
. It is implied that magnitude of R
1
may vary depending on the signal generated by the control means and/or on the state of semiconductor device (conducting or non-conducting). It is beneficial to have resistances R
1
and R
2
that are matched to provide stability of the circuitry characteristics. It would also be beneficial for the resistance R
3
to have a layout matched to the resistances R
1
and R
2
.
Advantageously, the semiconductor device of the switching circuitry comprises a transistor which is selected from the group consisting of BJT transistor, FET transistor, JFET transistor, MOSFET transistor, depletion type MOSFET transistor, enhanced type MOSFET transistor and MESFET transistor. Conveniently, the switching circuitry comprises one of the PMOS and NMOS transistors, where the control means are connected to the gate of the transistor, the source of the transistor being the input node and the drain being the output node. It is also possible to interchange source and gain of the transistor, using them as output and input nodes respectively. Alternatively, the circuitry may comprise the semiconductor device including a first transistor and a second transistor, the transistors having a complimentary structure and arranged so that the source of the first transistor is connected to the drain of the second transistor to form one of the input and output nodes, and the source of the second transistor is connected to the drain of the first transistor to form the other node;
the control means comprising a first output connected to the gate of the first transistor through a first output resistance R,a, and a second output connected to the gate of the second transistor through a second output resistance R
1b
, the first and second outputs generating complimentary control signals for switching the semiconductor device between the first and second states, and the circuitry being characterized in that R
1,a
, R
1,b
>R
2
, and R
1,a
, R
1,b
~R
3
.
Beneficially, R
1,a,
R
1,b
>>R
2
and R
1,a,
R
1,b
≧R
3
. Alternatively, instead of one control means having two complimentary outputs, the control means may comprise a first control means and a second control means generating co
Ballato Josie
Nortel Networks Limited
Rios Roberto
LandOfFree
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