Switching circuit having error detection capability

Details Switching circuit having error detection capability Switching circuit having error detection capability

1993-04-20

1995-09-26

Beausoliel, Jr., Robert W.

Excavating

371 251, 371 48, G06F 1100, G01R 3128

Patent

active

054539900

ABSTRACT:
Switching circuits are connected between data input lines to and data output lines to connect switch paths between them. A two-input selector is connected to each of the data input lines to supply a data input signal or a test signal to the switching circuits. The selection of the two signals depends on whether the data input line is being used or not. The switch path connections in the switching circuits are controlled by the switching control circuits. Normally, a particular switch path is connected, but while testing, all the switch paths of an unoperated switching circuit which is not normally selected, are connected by a test address signal. The outputs of the switching circuits are detected by an error detector and compared with an expected data sequence, which indicates which output of the switching circuits is detected by the error detector.

REFERENCES:
patent: 5084874 (1992-01-01), Whetsel, Jr.
patent: 5257311 (1993-10-01), Naito et al.
patent: 5258752 (1993-11-01), Fukaya et al.
patent: 5260947 (1993-11-01), Posse
patent: 5267250 (1993-11-01), Uehora
Kanayama et al "Virnal Pain Management Functions for Broad Band ATM Networks", Globecom 1991, IEEE pp. 1401-1405.
M. A. Henrion et al., "Switching Network Architecture for ATM Broadband Communications", XIII International Switching Symposium, Session A47, 1990.

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