Switching circuit device and semiconductor device

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Utilizing three or more electrode solid-state device

Reexamination Certificate

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C327S431000

Reexamination Certificate

active

06218890

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a switching circuit device comprising a multi-gate field effect transistor (FET) and a semiconductor device for configuring the switching circuit device.
2. Description of the Background Art
For example, a GaAs switching circuit device capable of a high-speed switching operation is used for a transmitter-receiver in a microwave communication system.
FIG. 17
is a diagram showing an example of a transmitter-receiver using a switching circuit device comprising a conventional MESFET (Metal-Semiconductor Field Effect Transistor; hereinafter abbreviated as FET).
The transmitter-receiver shown in
FIG. 17
comprises a transmit-receive antenna
100
, a transmitting circuit
110
, and a receiving circuit
120
. The transmit-receive antenna
100
and the transmitting circuit
110
are connected to each other through an switching circuit device
130
comprising a FET, and the transmit-receive antenna
100
and the receiving circuit
120
are connected to each other through a switching circuit device
140
comprising an FET. Control voltages V1 and V2 are respectively applied to gate electrodes G
1
and G
2
in the FETs constituting the switching circuit devices
130
and
140
.
In such a transmitter-receiver, when the control voltage V1 is 0 volt, and the control voltage V2 is −10 volts, the switching circuit device
130
is turned on, and the switching circuit device
140
is turned off. Consequently, a transmission signal from the transmitting circuit
110
is transmitted to the antenna
100
. On the other hand, when the control voltage V1 is −10 volts, and the control voltage V2 is 0 volts, the switching circuit device
130
is turned off, and the switching circuit device
140
is turned on. Consequently, a receiving signal received by the antenna
100
is transmitted to the receiving circuit
120
.
In order to decrease the size and increase the performance of communication equipment in microwave communication, a switching circuit device capable of performing a low-voltage operation and providing high-output power transmission is required. The switching circuit device
130
in the above-mentioned transmitter-receiver is configured by connecting a plurality of FETs
131
to
134
in series, as shown in
FIG. 18
, so that large power can be turned on or off at a low control voltage V1. Similarly, the switching circuit device
140
is also configured by connecting a plurality of FETs
141
to
144
in series, so that a large power can be turned on or off at a low control voltage V2. As a result, the switching circuit devices
130
and
140
can perform a low-voltage operation and make high-output power. transmission. In
FIG. 18
, an interstage resistor RH is a resistor for keeping an interstage potential between the FETs constant.
When the number of stages of the FETs constituting the switching circuit device as described above is increased, however, an area occupied by the FETs is increased. Therefore, the size of the switching circuit device is increased.
In order to solve the above-mentioned disadvantage, a switching circuit device using a multi-gate FET having a plurality of gate electrodes between a drain electrode and a source electrode (between a set of ohmic electrodes) has been proposed in JP-A-9-238059.
In the switching circuit device described in the above-mentioned application, however, the chip size can be decreased, while an interstage potential between the gate electrodes cannot be kept constant. Therefore, the interstage potential between the gate electrodes becomes unstable. As a result, a portion between the drain electrode and the source electrode cannot be brought into a completely off state when the switching circuit device is turned off.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a switching circuit device using a multi-gate FET capable of carrying out on-off control of large power in small size, and stabilizing a potential between gate electrodes and restraining a leakage signal between ohmic electrodes when it is turned off.
Another object of the present invention is to provide a semiconductor device which is suited to configure the above-mentioned switching circuit device.
A switching circuit device according to the present invention is a switching circuit device comprising a multi-gate field effect transistor, wherein the field effect transistor comprises a first ohmic electrode, a second ohmic electrode, a plurality of gate electrodes, a low resistor having its one end connected between the adjacent gate electrodes out of the plurality of gate electrodes, and a high resistor having a resistance value larger than the resistance value of the low resistor for changing an interstage potential between the adjacent gate electrodes into a predetermined potential through the low resistor.
In this case, the interstage potential between the adjacent gate electrodes out of the plurality of gate electrodes is stabilized upon being changed into a predetermined potential by the high resistor. Consequently, there can be provided a switching circuit device capable of carrying out on-off control of large power in small size and restraining a leakage signal between the ohmic electrodes in a case where it is turned off.
The plurality of gate electrodes may comprise a first gate electrode and a second gate electrode adjacent to the first gate electrode, the one end of the low resistor may be connected between the first gate electrode and the second gate electrode, and the high resistor may be connected between the other end of the low resistor and one of the first ohmic electrode and the second ohmic electrode.
In this case, the interstage potential between the first gate electrode and the second gate electrode is stabilized upon being equal to a potential at one of the first ohmic electrode and the second ohmic electrode by the high resistor.
The plurality of gate electrodes may comprise a first gate electrode and a second gate electrode adjacent to the first gate electrode, the high resistor may comprise a first high resistor and a second high resistor, the one end of the low resistor may be connected between the first gate electrode and the second gate electrode, the first high resistor may be connected to the other end of the low resistor and the first ohmic electrode, and the second high resistor may be connected between the other end of the low resistor and the second ohmic electrode.
In this case, the interstage potential between the first gate electrode and the second gate electrode is stabilized upon being equal to the potential at the first ohmic electrode and the potential at the second ohmic electrode by the first and second high resistors.
The plurality of gate electrodes may comprise a first gate electrode, a second gate electrode adjacent to the first gate electrode, and a third gate electrode adjacent to the second gate electrode, the low resistor may comprise a first low resistor and a second low resistor, the first low resistor may have its one end connected between the first gate electrode and the second gate electrode, the second low resistor may have its one end connected between the second gate electrode and the third gate electrode, and the high resistor may be connected to the other end of the first low resistor and the other end of the second low resistor.
In this case, the interstage potential between the first gate electrode and the second gate electrode and the interstage potential between the second gate electrode and the third gate electrode are equal to each other by the high resistor, so that both the interstage potentials are stabilized.
The plurality of gate electrodes may comprise a first gate electrode, a second gate electrode adjacent to the first gate electrode, and a third gate electrode adjacent to the second gate electrode, the low resistor may comprise a first low resistor and a second low resistor, the high resistor may comprise a first high resistor and a second high resistor, the first low resis

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