Switching circuit arrangement for monitoring a binary signal

Details Switching circuit arrangement for monitoring a binary signal Switching circuit arrangement for monitoring a binary signal

1988-02-10

1989-06-13

Miller, Stanley D.

Electrical pulse counters, pulse dividers, or shift registers: c

Pulse counting or dividing chains

Using bistable regenerative trigger circuits

377107, 377 28, 377 49, 3072721, H03K 2140, H03K 2350, H03K 2700

Patent

active

048399124

ABSTRACT:
A circuit arrangement for monitoring a binary signal having at least one level shift within a characteristic waiting time, such circuit including two flip-flops which receive control pulses at intervals at least as long as the characteristic waiting time. In order to enable the two flip-flops to employ the same clock pulses, a gate circuit is assigned to each of them, the output of which is connected to the data input of the assigned flip-flop. If a control pulse is present, the first gate circuit ensures that the first flip-flop can switch to its set state, while the second gate ensures that the state of the second flip-flop is switched to the inverse of the state of the first flip-flop. If a control pulse is not present, the first flip-flop can only be switched to its reset state when the binary signal to be monitored has the binary value 1, while the second flip-flop cannot switch from its existing state.

REFERENCES:
patent: 2984789 (1981-05-01), O'Brien
patent: 3961203 (1976-06-01), Hutch
patent: 4399412 (1983-08-01), Rinaldi
patent: 4446437 (1984-05-01), Rinaldi

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