Switching arrangement for the input of interrupt commands and th

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G06F 304, G06F 900

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active

042714648

ABSTRACT:
In order to provide an interrupt command signal in a computer and receive an interrupt acknowledgment at a single input/output terminal, an interrupt command encoder includes an inverter for receiving an interrupt command at a first logic level and providing the interrupt command at a second logic level to the single input/output terminal. An interrupt command logic circuit responds to the interrupt command to produce an interrupt signal to the computer which, in turn, is fed back to the single input/output terminal as an interrupt acknowledgment signal of the first logic level. A gate connected to the interrupt command input and to the single input/output terminal is responsive to the interrupt acknowledgment signal of the first logic level only to provide a corresponding signal acknowledging that the computer has received the interrupt signal.

REFERENCES:
patent: 3800287 (1974-03-01), Albright
patent: 3866181 (1975-02-01), Gayman et al.
patent: 3886524 (1975-05-01), Appelt
patent: 3993981 (1976-11-01), Cassarino, Jr. et al.
patent: 4003028 (1977-01-01), Bennett et al.
patent: 4096569 (1978-06-01), Barlow
patent: 4148011 (1973-04-01), McLagan et al.

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