Multiplex communications – Pathfinding or routing – Through a circuit switch
Reexamination Certificate
1999-07-09
2004-01-06
Pham, Chi (Department: 2667)
Multiplex communications
Pathfinding or routing
Through a circuit switch
C370S381000, C370S395700, C370S412000, C370S428000
Reexamination Certificate
active
06674753
ABSTRACT:
FIELD OF THE INVENTION
This invention relates a to a time division multiplexing system and, more particularly, to a switching apparatus incorporated in the time division multiplexing system for controlling the data transmission, a method for controlling the data transmission and an information storage medium storing a program sequence for the method.
DESCRIPTION OF THE RELATED ART
Conventionally, the switching apparatus is connected to a message line, and messages are transferred from the switching apparatus to the message line through a time division multiplexing. Time on the message line is divided into frames, and each frame is further divided into time slots. A time slot starts at a certain timing in one of the frames, and forms a channel together with the time slots at the same timing in the other frames. The messages are not constant in length. A message may require the time slots different from those to be required for another message. The message is divided into pieces, and the pieces of message are assigned to the time slots of a channel.
The prior art switching apparatus includes message memories for storing the messages and message transmitters for delivering the messages to the channels. Each of the message memories is exclusively used for one of the channels, and the message transmitters are also assigned the channels, respectively. Thus, the prior art switching apparatus requires plural combinations of the message memories and the message transmitters equal in number to the channels. This feature is uneconomical. The message memories and the message transmitters increase the production cost of the prior art switching apparatus. Thus, a problem inherent in the prior art switching apparatus is the high production cost.
SUMMARY OF THE INVENTION
It is therefore an important object of the present invention to provide a switching apparatus, which is low in production cost.
It is also an important object of the present invention to provide a method for transferring messages in a time division multiplexing fashion which is repeated in the switching apparatus.
It is also an important object of the present invention to provide an information storage medium for readably storing programmed instructions for the method.
To accomplish the object, the present invention proposes to share a message memory between channels.
In accordance with one aspect of the present invention, there is provided a switching apparatus for supplying pieces of data information to plural channels defined on a data line through a time division multiplexing comprising a first memory having first memory areas storing first pieces of data information to be selectively transferred to the plural channels and responsive to a first address signal for selectively outputting the first pieces of data information, a second memory having second memory areas storing second pieces of data information to be selectively transferred to the plural channels and responsive to a second address signal for selectively outputting the second pieces of data information, a selector connected between the first and second memories and the data line and responsive to a control signal so as to selectively transfer the first pieces of data information and the second pieces of data information to the plural channels, a channel controller including a third memory having third memory areas associated to the plural channels, respectively, and storing pieces of address information each assigned to one of the first memory areas for storing one of the first pieces of data information to be transferred to associated one of the plural channels or one of the second memory areas for storing one of the second pieces of data information to be transferred to the associated one of the plural channels together with first pieces of flag information each used for controlling the data transfer from the first and second memories to associated one of the plural channels and a controller connected to the first memory, the second memory, the third memory and the selector, and sequentially accessing the third memory areas for controlling the data transfer from the first and second memories through the selector to the output line with the control signal, the first address signal and the second address signal.
In accordance with another aspect of the present invention, there is provided a method for transferring pieces of data information to plural channels through a time division multiplexing comprising the steps of a) storing first pieces of data information, second pieces of data information and plural combinations of pieces of address information and first pieces of flag information in first memory areas of a first memory, second memory areas of a second memory and third memory areas of a third memory, respectively, b) deciding a timing to be given for a data transfer to one of the plural channels, c) checking one of the third memory areas assigned to the aforesaid one of the plural channels to see whether the first piece of flag information is indicative of a data transfer from the first memory to the aforesaid one of the plural channels or from the second memory to the aforesaid one of the plural channels and d) instructing either first memory or second memory to transfer one of the first pieces of data information or one of the second pieces of data information to the aforesaid one of the plural channels.
In accordance with yet another aspect of the present invention, there is provided an information storage medium for storing a set of programmed instructions representative of a method for transferring pieces of data information to plural channels through a time division multiplexing comprising the steps of a) storing first pieces of data information, second pieces of data information and plural combinations of pieces of address information and first pieces of flag information in first memory areas of a first memory, second memory areas of a second memory and third memory areas of a third memory, respectively, b) deciding a timing to be given for a data transfer to one of the plural channels, c) checking one of the third memory areas assigned to the aforesaid one of the plural channels to see whether the first piece of flag information is indicative of a data transfer from the first memory to the aforesaid one of the plural channels or from the second memory to the aforesaid one of the plural channels and d) instructing either first memory or second memory to transfer one of the first pieces of data information or one of the second pieces of data information to the aforesaid one of the plural channels.
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Harasaki Kazuhiko
Hirata Hideyuki
Foley & Lardner
Ly Anh Vu
NEC Corporation
Pham Chi
LandOfFree
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